公开(公告)号：US09171755B2

公开(公告)日：2015-10-27

申请号：US14453310

申请日：2014-08-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Euibok Lee ,  Jongmin Baek ,  Dohyoung Kim ,  Tsukasa Matsuda ,  Youngwoo Cho ,  Jongseo Hong

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/764 ,  H01L21/762

CPC classification number: H01L21/7682 ,  H01L21/02296 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/762 ,  H01L21/764 ,  H01L21/76802 ,  H01L21/76849 ,  H01L21/76882 ,  H01L21/76883 ,  H01L21/76885

Abstract: A method of manufacturing a semiconductor device may include: forming an interlayer insulating layer having openings on a substrate; forming a metal layer in the openings and on the interlayer insulating layer, the metal layer including a sidewall portion on a sidewall of each of the openings and a bottom portion on a bottom surface of each of the openings, wherein the bottom portion is thicker than the sidewall portion; reflowing the metal layer to form metal patterns in the openings, the metal patterns having top surfaces at a level lower than a topmost surface of the interlayer insulating layer; and/or forming capping patterns covering the metal patterns in the openings.

Abstract translation: 制造半导体器件的方法可以包括：在衬底上形成具有开口的层间绝缘层; 在开口和层间绝缘层上形成金属层，金属层包括在每个开口的侧壁上的侧壁部分和在每个开口的底表面上的底部，其中底部部分比 侧壁部分; 回流金属层以在开口中形成金属图案，金属图案具有位于层间绝缘层的最上表面以下的顶表面; 和/或形成覆盖开口中的金属图案的覆盖图案。

公开(公告)号：US12255139B2

公开(公告)日：2025-03-18

申请号：US17751819

申请日：2022-05-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Anthony Dongick Lee ,  Sangcheol Na ,  Kichul Park ,  Sungyup Jung ,  Youngwoo Cho

IPC: H01L23/528 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

Abstract: A semiconductor device including a first insulating structure on a substrate and including a first etch stop layer and a first interlayer insulating layer on the first etch stop layer, a second insulating structure on the first insulating structure and including a second etch stop layer and a second interlayer insulating layer on the second etch stop layer, a conductive line penetrating through the second insulating structure, and extending in a first direction parallel to an upper surface of the substrate, and a plurality of contacts penetrating through the first insulating structure and connected to the conductive line may be provided. The conductive line may include a protrusion extending below the second insulating structure and penetrating through the first interlayer insulating layer to be in contact with the first etch stop layer.

公开(公告)号：US12009681B2

公开(公告)日：2024-06-11

申请号：US17421419

申请日：2020-01-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heeseung Choi ,  Sungwoo Choi ,  Yongsuk Lee ,  Youngwoo Cho ,  Woojong Cho ,  Kuyoung Choi

IPC: H02J7/00 ,  B25J19/00

CPC classification number: H02J7/0045 ,  B25J19/005 ,  H02J2310/22

Abstract: An electronic device, according to one embodiment of the present invention, comprises: a housing; a drive unit for moving the housing; a battery mounting unit formed in the housing so as to enable the placement of batteries, the battery mounting unit comprising a first slot enabling the placement of a first battery, and a second slot enabling the placement of a second battery; a separator device, disposed on the battery mounting unit, for separating the first battery from the first slot or separating the second battery from the second slot; and a processor electrically connected to the drive unit and the separator device, wherein the processor may control the separator device so that same separates the second battery from the second slot when the first battery is placed in the first slot, and separates the first battery from the first slot when the second battery is placed in the second slot. In addition, other various embodiments are possible.