公开(公告)号：US20240282829A1

公开(公告)日：2024-08-22

申请号：US18500797

申请日：2023-11-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young Woo Kim ,  Kyoung Woo Lee ,  Min Chan Gwak ,  Guk Hee Kim ,  Sang Cheol Na ,  Anthony Dongick Lee

IPC: H01L29/417 ,  H01L23/48 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/41733 ,  H01L23/481 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device includes a substrate that has first and second surfaces opposite to each other in a first direction, a first fin-type pattern that protrudes in the first direction from the first surface of the substrate and extends in a second direction, a first source/drain pattern on the first fin-type pattern, a first source/drain contact on the first source/drain pattern, a contact connection via that extends in the first direction and is electrically connected to the first source/drain contact, a buried conductive pattern that is in the substrate, is electrically connected to the contact connection via, and has first and second surfaces opposite to each other in the first direction, the first surface of the buried conductive pattern facing the first source/drain contact, and first buried insulating liners that extend along sidewalls and along the first surface of the buried conductive pattern.

公开(公告)号：US20250079265A1

公开(公告)日：2025-03-06

申请号：US18457311

申请日：2023-08-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang Cheol NA ,  Kyoung Woo Le ,  Min Chan Gwak ,  Guk Hee Kim ,  Beom Jin Kim ,  Young Woo Kim ,  Anthony Dongick Lee ,  Myeong Gyoon Chae

IPC: H01L23/48 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786

Abstract: A semiconductor device includes a substrate that includes a first surface and a second surface, a first source/drain pattern disposed on the first surface of the substrate, a second source/drain pattern disposed on the first surface of the, a first source/drain contact disposed on the first source/drain pattern and connected to the first source/drain pattern, a second source/drain contact disposed on the second source/drain pattern and connected to the second source/drain pattern, a rear wiring line disposed on the second surface of the substrate, a first contact connection via that connects the rear wiring line with the first source/drain contact, a second contact connection via that connects the rear wiring line with the second source/drain contact and is spaced apart from the first contact connection via, and an air gap structure disposed between the first contact connection via and the second contact connection via.

公开(公告)号：US12255139B2

公开(公告)日：2025-03-18

申请号：US17751819

申请日：2022-05-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Anthony Dongick Lee ,  Sangcheol Na ,  Kichul Park ,  Sungyup Jung ,  Youngwoo Cho

IPC: H01L23/528 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

Abstract: A semiconductor device including a first insulating structure on a substrate and including a first etch stop layer and a first interlayer insulating layer on the first etch stop layer, a second insulating structure on the first insulating structure and including a second etch stop layer and a second interlayer insulating layer on the second etch stop layer, a conductive line penetrating through the second insulating structure, and extending in a first direction parallel to an upper surface of the substrate, and a plurality of contacts penetrating through the first insulating structure and connected to the conductive line may be provided. The conductive line may include a protrusion extending below the second insulating structure and penetrating through the first interlayer insulating layer to be in contact with the first etch stop layer.

公开(公告)号：US11978668B2

公开(公告)日：2024-05-07

申请号：US17546470

申请日：2021-12-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ming He ,  Harsono Simka ,  Anthony Dongick Lee ,  Seowoo Nam ,  Sang Hoon Ahn

IPC: H01L21/768 ,  H01L21/3105 ,  H01L21/311 ,  H01L23/532 ,  H01L23/535

CPC classification number: H01L21/76895 ,  H01L21/31053 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/76805 ,  H01L21/76819 ,  H01L21/76829 ,  H01L23/53242 ,  H01L23/53257 ,  H01L23/535

Abstract: Integrated circuit devices including a via and methods of forming the same are provided. The methods may include forming a conductive wire structure on a substrate. The conductive wire structure may include a first insulating layer and a conductive wire stack in the first insulating layer, and the conductive wire stack may include a conductive wire and a mask layer stacked on the substrate. The method may also include forming a recess in the first insulating layer by removing the mask layer, the recess exposing the conductive wire, forming an etch stop layer and then a second insulating layer on the first insulating layer and in the recess of the first insulating layer, and forming a conductive via extending through the second insulating layer and the etch stop layer and contacting the conductive wire.

公开(公告)号：US20240304513A1

公开(公告)日：2024-09-12

申请号：US18397389

申请日：2023-12-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Anthony Dongick Lee ,  Min Chan Gwak ,  Guk Hee Kim ,  Young Woo Kim ,  Sang Cheol Na ,  Kyoung Woo Lee

IPC: H01L23/367 ,  H01L21/683 ,  H01L23/528 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775

CPC classification number: H01L23/3672 ,  H01L21/6835 ,  H01L23/5286 ,  H01L29/0673 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/775 ,  H01L2221/68309

Abstract: A semiconductor device includes an active pattern on a first surface of a substrate and extending in a first direction, a field insulating film on the first surface and a side surface of the active pattern, a gate structure on the active pattern and field insulating film and extending in a second direction intersecting the first direction, a source/drain area on a side surface of the gate structure and contacting the active pattern, and a through-contact extending in a third direction perpendicular to the first and second directions and extending through the field insulating film. The device further includes a buried pattern in the substrate contacting the through-contact, a backside wiring structure on a second surface of the substrate and electrically connected to the buried pattern, and a heat-dissipating structure in the substrate adjacent to the buried pattern. The heat-dissipating structure fills a trench extending from the second surface into the substrate.

公开(公告)号：US20240282828A1

公开(公告)日：2024-08-22

申请号：US18238872

申请日：2023-08-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngwoo Kim ,  KYOUNGWOO LEE ,  MINCHAN GWAK ,  Gukhee Kim ,  SANGCHEOL NA ,  Anthony Dongick Lee

IPC: H01L29/417 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/41733 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78696

Abstract: An embodiment provides a semiconductor device including a semiconductor substrate having first and second surfaces opposite each other, a channel pattern disposed on the first surface of the semiconductor substrate; source/drain patterns disposed on the first surface of the semiconductor substrate and disposed at both sides of the channel pattern; first and second etch stop films disposed on the first surface of the semiconductor substrate; a contact electrode electrically connected to the source/drain patterns; a lower wire structure disposed on the second surface of the semiconductor substrate; and a through via that passes through the semiconductor substrate, the first etch stop film, and the second etch stop film to connect the contact electrode and the lower wire structure, wherein the through via includes a first portion contacting the contact electrode and a second portion contacting the first portion and disposed between the first portion and the lower wire structure.

公开(公告)号：US20240072117A1

公开(公告)日：2024-02-29

申请号：US18307259

申请日：2023-04-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gukhee Kim ,  Kyoungwoo Lee ,  Jeewoong Kim ,  Sangcheol Na ,  Minchan Gwak ,  Youngwoo Kim ,  Anthony Dongick Lee

IPC: H01L29/08 ,  H01L21/8234 ,  H01L27/088

CPC classification number: H01L29/0847 ,  H01L21/823475 ,  H01L27/088

Abstract: A semiconductor device includes a substrate having a first and second active patterns therein, first and second source/drain patterns extending on the first and second active patterns, respectively, and an active contact on the first and second source/drain patterns. An upper contact is provided, which extends from the active contact towards the substrate, and between the first and second active patterns. A lower power interconnection line is provided, which is buried in a lower portion of the substrate and includes: a buried interconnection portion having a line shape, and a lower contact portion extending vertically from the buried interconnection portion to a bottom surface of the upper contact. A barrier pattern is provided, which extends between the lower contact portion and the upper contact, but not between the buried interconnection portion and the lower contact portion.