公开(公告)号：US08994854B2

公开(公告)日：2015-03-31

申请号：US13771409

申请日：2013-02-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yu Jin Park ,  Ji Min Cheon ,  Jin Ho Seo ,  Ji Hun Shin ,  Seog Heon Ham

IPC: H04N5/217 ,  H04N3/14 ,  H03K5/1252 ,  H04N5/378

CPC classification number: H03K5/1252 ,  H04N5/378

Abstract: A correlated double sampling (CDS) circuit includes a correction circuit configured to receive an input pixel signal through a first node via a column line, correct the input pixel signal, and output the corrected pixel signal through a second node; and a comparator including first and second input terminals, the first input terminal being connected to the second node and being configured to receive the corrected pixel signal, and the second input terminal configured to receive a ramp signal, the comparator being configured to compare the corrected pixel signal with the ramp signal and output a comparison signal indicating a result of the comparing, wherein the correction circuit includes, a first capacitor connected between the first and second nodes, and one or more metal lines disposed adjacent to the first capacitor, and wherein at least one other capacitor is formed by the first capacitor and the metal line.

Abstract translation: 相关双采样（CDS）电路包括校正电路，配置为经由列线接收通过第一节点的输入像素信号，校正输入像素信号，并通过第二节点输出经校正的像素信号; 以及比较器，包括第一和第二输入端子，所述第一输入端子连接到所述第二节点并且被配置为接收所述校正的像素信号，并且所述第二输入端子被配置为接收斜坡信号，所述比较器被配置为将所述经校正的 并且输出表示比较结果的比较信号，其中所述校正电路包括连接在所述第一和第二节点之间的第一电容器和与所述第一电容器相邻布置的一个或多个金属线，并且其中 至少一个电容器由第一电容器和金属线形成。

公开(公告)号：US09407849B2

公开(公告)日：2016-08-02

申请号：US14084705

申请日：2013-11-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Ho Suh ,  Yu Jin Park ,  Jin Ho Seo ,  Kwi Sung Yoo ,  Seung Hyun Lim ,  Seog Heon Ham ,  Kyoung Min Koh ,  Han Yang ,  Jae Cheol Yun ,  Yong Lim ,  Jae Jin Jung

IPC: H01J40/14 ,  H04N5/378 ,  H04N5/374

CPC classification number: H04N5/378 ,  H04N5/3742

Abstract: An image sensor includes a first column pair and a second column pair among a plurality of columns of a pixel array, an analog-to-digital converter pair, and a switch arrangement circuit configured to connect the first column pair with the analog-to-digital converter pair in response to first switch control signals such that two rows among a plurality of rows in the pixel array are read during a single access time.

Abstract translation: 图像传感器包括像素阵列的多列之中的第一列对和第二列对，模数转换器对以及被配置为将第一列对与模拟 - 数字转换器对连接的开关布置电路， 数字转换器对响应于第一开关控制信号，使得在单个访问时间期间读取像素阵列中的多行中的两行。

公开(公告)号：US09055250B2

公开(公告)日：2015-06-09

申请号：US14276687

申请日：2014-05-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yu Jin Park ,  Jin Ho Seo ,  Seog Heon Ham ,  Kwang Hyun Lee ,  Han Yang

IPC: H04N5/335 ,  H04N5/3745 ,  H04N5/357 ,  G01J1/46 ,  H04N5/378

CPC classification number: H04N5/3745 ,  G01J1/46 ,  H04N5/335 ,  H04N5/357 ,  H04N5/378

Abstract: A CDS circuit includes first capacitors; second capacitors; and a switch arrangement which, in response to a switch control signal, connects the first capacitors in series between a pixel signal output node and a ground to compress the pixel signal and connects the second capacitors in series between a ramp signal output node and the ground to compress the ramp signal, or connects the first capacitors in parallel between the pixel signal output node and a first input node of the comparator and connects the second capacitors in parallel between the ramp signal output node and a second input node of the comparator.

Abstract translation: CDS电路包括第一电容器; 第二电容器; 以及开关装置，其响应于开关控制信号将第一电容器串联连接在像素信号输出节点和地之间以压缩像素信号，并将第二电容器串联连接在斜坡信号输出节点和地之间 压缩斜坡信号，或者将像素信号输出节点和比较器的第一输入节点并联的第一电容器连接在斜坡信号输出节点和比较器的第二输入节点之间并联连接第二电容器。

公开(公告)号：US09369144B2

公开(公告)日：2016-06-14

申请号：US14327047

申请日：2014-07-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae Hong Kim ,  Yu Jin Park ,  Jin Ho Seo ,  Kwi Sung Yoo ,  Wun Ki Jung ,  Han Kook Cho ,  Seog Heon Ham ,  Min Ji Hwang

IPC: H04N5/378 ,  H03M1/12 ,  H03M1/18

CPC classification number: H03M1/12 ,  H03M1/18 ,  H04N5/378

Abstract: An analog-to-digital converter includes a gain amplification unit configured to receive a pixel signal at a first node and to amplify a gain of the pixel signal, a first capacitor connected between the first node and a second node, an amplifier configured to receive and amplify a signal output from the gain amplification unit and the first capacitor, and a conversion circuit configured to convert an output signal of the amplifier to a digital signal based on a reference signal and output the digital signal as a first output signal.

Abstract translation: 模数转换器包括：增益放大单元，被配置为在第一节点处接收像素信号并放大像素信号的增益;连接在第一节点和第二节点之间的第一电容器，被配置为接收 并且放大从增益放大单元和第一电容器输出的信号，以及转换电路，被配置为基于参考信号将放大器的输出信号转换为数字信号，并将数字信号作为第一输出信号输出。

公开(公告)号：US09148600B2

公开(公告)日：2015-09-29

申请号：US14295711

申请日：2014-06-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yu Jin Park ,  Jae Hong Kim ,  Jin Ho Seo ,  Kwi Sung Yoo ,  Seog Heon Ham

IPC: H04N5/335 ,  H04N5/3745 ,  H03G3/00 ,  H03G1/00 ,  H04N5/378

CPC classification number: H04N5/37457 ,  H03G1/0088 ,  H03G3/001 ,  H04N5/378

Abstract: A programmable gain amplifier includes a sampling circuit, a source follower, a first capacitor and an error amplifier. The sampling circuit is configured to perform correlated double sampling on an input signal using a reference voltage. The first capacitor is connected between the sampling circuit and the source follower. The error amplifier is connected between an input terminal of the source follower and an output terminal of the source follower. The error amplifier is configured to reset a voltage of the output terminal of the source follower to the reference voltage during a source follower reset operation.

Abstract translation: 可编程增益放大器包括采样电路，源极跟随器，第一电容器和误差放大器。 采样电路被配置为使用参考电压对输入信号执行相关双采样。 第一个电容器连接在采样电路和源极跟随器之间。 误差放大器连接在源极跟随器的输入端子和源极跟随器的输出端子之间。 误差放大器被配置为在源极跟随器复位操作期间将源极跟随器的输出端子的电压复位到参考电压。