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公开(公告)号:US09380233B2
公开(公告)日:2016-06-28
申请号:US14185081
申请日:2014-02-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Han Yang , Kyoung Min Koh , Yong Lim , Shin Hoo Kim , Ju Ha Kim , Seung Jin Lee , Jae Jin Jung , Kee Moon Chun
IPC: H04N5/361
CPC classification number: H04N5/361
Abstract: An image sensor includes a pixel array including at least one active pixel and at least one line-optical black (L-OB) pixel arranged in a matrix including first to nth rows and first to mth columns, the pixel array configured to output a pixel signal and a dark-level offset signal in units of columns during a read-out operation in one of the first to nth rows; a row driver configured to output a selection control signal to the first to nth rows; and an analog-to-digital converter (ADC) block configured to digitize the pixel signal and the dark-level offset signal. In the pixel array, a dark-level offset signal is simultaneously output from an L-OB pixel in another row during the read-out operation in one of the first to nth rows. Here, ‘n’ and ‘m’ each denote an integer that is equal to or greater than ‘2’.
Abstract translation: 图像传感器包括像素阵列,其包括至少一个有源像素和布置在包括第一至第n行和第一至第m列的矩阵中的至少一个线光学黑(L-OB)像素,所述像素阵列被配置为输出像素 在第一到第n行之一的读出操作期间以列为单位的信号和暗电平偏移信号; 行驱动器,被配置为向第一至第n行输出选择控制信号; 以及被配置为数字化像素信号和暗电平偏移信号的模数转换器(ADC)块。 在像素阵列中,在第一至第n行之一的读出操作期间,从另一行中的L-OB像素同时输出暗电平偏移信号。 这里,'n'和'm'分别表示等于或大于'2'的整数。
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2.
公开(公告)号:US12238437B2
公开(公告)日:2025-02-25
申请号:US17895340
申请日:2022-08-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sung Yong Kim , Jae Jin Jung
IPC: H04N25/75 , H04N25/63 , H04N25/71 , H04N25/772
Abstract: An image sensing device providing improved image quality includes a pixel array that outputs a pixel signal, a comparator that outputs a comparison result signal by comparing a reference signal and the pixel signal, a counter that outputs a count result signal having m bits by counting the comparison result signal, and an image signal processor that outputs an image signal having n bits by correcting the count result signal, wherein m and n are integers, and m is greater than n.
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公开(公告)号:US12069385B2
公开(公告)日:2024-08-20
申请号:US17342912
申请日:2021-06-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jae Jin Jung , Seung Jin Lee , Kwi Sung Yoo
IPC: H04N25/46 , H04N23/84 , H04N25/772
CPC classification number: H04N25/46 , H04N23/84 , H04N25/772
Abstract: An electronic device includes a pixel array that outputs a raw image including color pixels and specific pixels, a logic circuit that outputs a first binned image by performing first binning on pixels in a row direction for each unit kernel of the raw image, and a processor that outputs a second binned image by performing second binning on the first binned image. When a unit kernel includes at least one of the specific pixels, a column to which the at least one specific pixel belongs is read out at a readout timing different from a readout timing of a column to which none of the specific pixels belong and undergoes the first binning. The second binning combines a third binned image of the column to which none of the specific pixels belong with a fourth binned image of the column to which the at least one specific pixel belongs.
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公开(公告)号:US12231794B2
公开(公告)日:2025-02-18
申请号:US17897253
申请日:2022-08-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jun An Lee , Jae Jin Jung , Soon Ik Cho
IPC: H04N25/75 , H01L27/146 , H04N25/704 , H04N25/772
Abstract: An image sensor includes a pixel array and a readout circuit. The pixel array includes a first unit pixel region including first, second and third sub-pixel regions having a first color filter, sequentially disposed along a first row line, and sharing a first floating diffusion region, and a second unit pixel region including a first, second and third sub-pixel regions having a second color filter, sequentially disposed along a second row line, and sharing a second floating diffusion region. The readout circuit includes a first analog-digital converter receiving a first pixel signal from the first unit pixel region through a first pixel signal output line and converting the first pixel signal into digital data, and a second analog-digital converter receiving a second pixel signal from the second unit pixel region through a second pixel signal output line and converting the second pixel signal into digital data, wherein at least one of the first unit pixel region and the second unit pixel region further includes a phase detection pixel region.
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5.
公开(公告)号:US10362253B2
公开(公告)日:2019-07-23
申请号:US14956685
申请日:2015-12-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kyoung Min Koh , Jae Jin Jung , Moo Young Kim , Jae Cheol Yun , Seung Jin Lee
Abstract: An image sensor is provided. The image sensor includes a pixel configured to generate a reset signal and an image signal, a comparator configured to compare the reset signal with a reference signal and generate a first comparison signal, a counter configured to generate a first count value corresponding to the reset signal based on a clock signal and the first comparison signal, and a reference signal generator configured to generate the reference signal which changes between a first level corresponding to a maximum reset count value of the counter and a second level corresponding to a minimum reset count value of the counter during a reset signal period.
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公开(公告)号:US09407849B2
公开(公告)日:2016-08-02
申请号:US14084705
申请日:2013-11-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sung Ho Suh , Yu Jin Park , Jin Ho Seo , Kwi Sung Yoo , Seung Hyun Lim , Seog Heon Ham , Kyoung Min Koh , Han Yang , Jae Cheol Yun , Yong Lim , Jae Jin Jung
CPC classification number: H04N5/378 , H04N5/3742
Abstract: An image sensor includes a first column pair and a second column pair among a plurality of columns of a pixel array, an analog-to-digital converter pair, and a switch arrangement circuit configured to connect the first column pair with the analog-to-digital converter pair in response to first switch control signals such that two rows among a plurality of rows in the pixel array are read during a single access time.
Abstract translation: 图像传感器包括像素阵列的多列之中的第一列对和第二列对,模数转换器对以及被配置为将第一列对与模拟 - 数字转换器对连接的开关布置电路, 数字转换器对响应于第一开关控制信号,使得在单个访问时间期间读取像素阵列中的多行中的两行。
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