公开(公告)号：US20240387168A1

公开(公告)日：2024-11-21

申请号：US18624788

申请日：2024-04-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinwoo Park ,  Heeyeop Chae ,  Yongjae Kim ,  Sangwuk Park ,  Yuna Lee ,  Jihye Lee ,  Jungpyo Hong

IPC: H01L21/02 ,  C23C16/44 ,  H01L21/311

Abstract: A method of manufacturing a semiconductor element includes placing a structure, the structure including a substrate and a first metal-containing film disposed on the substrate, fluorinating at least one atomic layer from an exposed surface of the first metal-containing film by supplying a fluorinating gas to the structure to form a fluorinated atomic layer, and etching the fluorinated atomic layer of the first metal-containing film by supplying an etching gas to the structure, wherein the etching gas includes an inert gas in a plasma state.

公开(公告)号：US12010840B2

公开(公告)日：2024-06-11

申请号：US17013726

申请日：2020-09-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Leeeun Ku ,  Yuna Lee ,  Sunyoung Kim ,  Kyungjae Park ,  Jonghyun Park ,  Bora Lee ,  Jongho Lim

IPC: H01L27/115 ,  H01L23/522 ,  H10B43/10 ,  H10B43/27

CPC classification number: H10B43/27 ,  H01L23/5226 ,  H10B43/10

Abstract: A vertical type non-volatile memory device includes a substrate having a cell array area of a block unit and an extension area, a vertical contact disposed in the extension area, a plurality of vertical channel structures provided on the substrate in the cell array area, a plurality of dummy channel structures provided on the substrate in the extension area, and a plurality of gate electrode layers and a plurality of interlayer insulation layers stacked alternately on the substrate. In an electrode pad connected to the vertical contact, dummy channel structures are disposed at both sides of the vertical contact and a horizontal cross-sectional surface of each of the plurality of dummy channel structures has a shape which is longer in one direction.

公开(公告)号：US20230209802A1

公开(公告)日：2023-06-29

申请号：US18088370

申请日：2022-12-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yuna Lee ,  Sangwuk Park ,  Hyunchul Yoon ,  Seungjae Lee ,  Joonkyu Rhee ,  Chanmin Lee ,  Jungpyo Hong

IPC: H10B12/00

CPC classification number: H10B12/09 ,  H10B12/482 ,  H10B12/50

Abstract: A method of fabricating a semiconductor device includes forming an insulating layer and a peripheral structure on first and second regions of the substrate, forming first and second mask layers on the insulating layer and the peripheral structure, patterning the first and second mask layers to form first and second mask structures on the first and second regions, etching the insulating layer using the first and second mask structures as an etching mask, to form insulating patterns, forming a sacrificial layer in spaces between two adjacent insulating patterns on the first region, removing the second mask pattern on the first region by a dry etching process, forming an anti-oxidation layer on a surface of the second mask layer on the second region after removing the second mask pattern on the first region, and removing the second mask layer with the anti-oxidation layer by a wet etching process.