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公开(公告)号:US20220301628A1
公开(公告)日:2022-09-22
申请号:US17834024
申请日:2022-06-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Won-bo SHIM , Ji-ho CHO , Yong-seok KIM , Byoung-taek KIM , Sun-gyung HWANG
Abstract: A program method of a nonvolatile memory device that performs a plurality of program loops is provided. At least one of the plurality of program loops includes dividing a channel of a selected cell string into a first side channel and a second side channel during a first interval and a second interval, turning off a string selection transistor of the selected cell string by applying a string select line voltage of a first level during the first interval, and boosting a first voltage of the first side channel and a second voltage of the second side channel, and turning on the string selection transistor by applying the string select line voltage of a second level different from the first level during the second interval, and performing a hot carrier injection (HCI) program operation on a selected memory cell corresponding to the first side channel or the second side channel.
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公开(公告)号:US20250014646A1
公开(公告)日:2025-01-09
申请号:US18892390
申请日:2024-09-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Won-bo SHIM , Ji-ho CHO , Yong-seok KIM , Byoung-taek KIM , Sun-gyung HWANG
IPC: G11C16/10 , G06F3/06 , G11C11/56 , G11C16/04 , G11C16/08 , G11C16/34 , H01L29/788 , H10B41/35 , H10B43/27 , H10B43/35
Abstract: A program method of a nonvolatile memory device that performs a plurality of program loops is provided. At least one of the plurality of program loops includes dividing a channel of a selected cell string into a first side channel and a second side channel during a first interval and a second interval, turning off a string selection transistor of the selected cell string by applying a string select line voltage of a first level during the first interval, and boosting a first voltage of the first side channel and a second voltage of the second side channel, and turning on the string selection transistor by applying the string select line voltage of a second level different from the first level during the second interval, and performing a hot carrier injection (HCI) program operation on a selected memory cell corresponding to the first side channel or the second side channel.
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公开(公告)号:US20190392902A1
公开(公告)日:2019-12-26
申请号:US16553891
申请日:2019-08-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Won-bo SHIM , Ji-ho CHO , Yong-seok KIM , Byoung-taek KIM , Sun-gyung HWANG
IPC: G11C16/10 , H01L29/788 , G11C16/34 , G11C16/04 , G11C16/08
Abstract: A program method of a nonvolatile memory device that performs a plurality of program loops is provided. At least one of the plurality of program loops includes dividing a channel of a selected cell string into a first side channel and a second side channel during a first interval and a second interval, turning off a string selection transistor of the selected cell string by applying a string select line voltage of a first level during the first interval, and boosting a first voltage of the first side channel and a second voltage of the second side channel, and turning on the string selection transistor by applying the string select line voltage of a second level different from the first level during the second interval, and performing a hot carrier injection (HCI) program operation on a selected memory cell corresponding to the first side channel or the second side channel.
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公开(公告)号:US20210217477A1
公开(公告)日:2021-07-15
申请号:US17220107
申请日:2021-04-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Won-bo SHIM , Ji-ho CHO , Yong-seok KIM , Byoung-taek KIM , Sun-gyung HWANG
Abstract: A program method of a nonvolatile memory device that performs a plurality of program loops is provided. At least one of the plurality of program loops includes dividing a channel of a selected cell string into a first side channel and a second side channel during a first interval and a second interval, turning off a string selection transistor of the selected cell string by applying a string select line voltage of a first level during the first interval, and boosting a first voltage of the first side channel and a second voltage of the second side channel, and turning on the string selection transistor by applying the string select line voltage of a second level different from the first level during the second interval, and performing a hot carrier injection (HCI) program operation on a selected memory cell corresponding to the first side channel or the second side channel.
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公开(公告)号:US20200119045A1
公开(公告)日:2020-04-16
申请号:US16707616
申请日:2019-12-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sang-wan NAM , Won-bo SHIM , Ji-ho CHO
IPC: H01L27/11582 , H01L27/11556 , H01L27/11524 , H01L29/10 , H01L27/1157 , H01L23/528 , G11C16/26 , G11C16/14 , G11C16/10 , G11C16/08 , G11C16/04
Abstract: A three-dimensional (3D) memory device having a plurality of vertical channel structures includes a first memory block, a second memory block, and a bit line. The first memory block includes first vertical channel structures extending in a vertical direction with respect to a surface of a substrate. The second memory block includes second vertical channel structures on the first vertical channel structures in the vertical direction and first and second string selection lines extending in a first horizontal direction and offset in the vertical direction. The bit line extends in the first horizontal direction between the first and second memory blocks and is shared by the first and second memory blocks. The second memory block may include first and second string selection transistors which are each connected to the bit line and the first string selection line and have different threshold voltages from each other.
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公开(公告)号:US20190304994A1
公开(公告)日:2019-10-03
申请号:US16182047
申请日:2018-11-06
Applicant: Samsung Electronics Co.,Ltd.
Inventor: Sang-wan NAM , Won-bo SHIM , Ji-ho CHO
IPC: H01L27/11582 , H01L29/10 , G11C16/04 , H01L27/1157 , H01L23/528 , G11C16/14 , G11C16/10 , G11C16/26 , G11C16/08
Abstract: A three-dimensional (3D) memory device having a plurality of vertical channel structures includes a first memory block, a second memory block, and a bit line. The first memory block includes first vertical channel structures extending in a vertical direction with respect to a surface of a substrate. The second memory block includes second vertical channel structures on the first vertical channel structures in the vertical direction and first and second string selection lines extending in a first horizontal direction and offset in the vertical direction. The bit line extends in the first horizontal direction between the first and second memory blocks and is shared by the first and second memory blocks. The second memory block may include first and second string selection transistors which are each connected to the bit line and the first string selection line and have different threshold voltages from each other.
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公开(公告)号:US20180268907A1
公开(公告)日:2018-09-20
申请号:US15870989
申请日:2018-01-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Won-bo SHIM , Ji-ho CHO , Yong-seok KIM , Byoung-taek KIM , Sun-gyung HWANG
IPC: G11C16/10 , H01L29/788 , G11C16/34 , G11C16/04 , G11C16/08
Abstract: A program method of a nonvolatile memory device that performs a plurality of program loops is provided. At least one of the plurality of program loops includes dividing a channel of a selected cell string into a first side channel and a second side channel during a first interval and a second interval, turning off a string selection transistor of the selected cell string by applying a string select line voltage of a first level during the first interval, and boosting a first voltage of the first side channel and a second voltage of the second side channel, and turning on the string selection transistor by applying the string select line voltage of a second level different from the first level during the second interval, and performing a hot carrier injection (HCI) program operation on a selected memory cell corresponding to the first side channel or the second side channel.
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公开(公告)号:US20170200506A1
公开(公告)日:2017-07-13
申请号:US15393465
申请日:2016-12-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Won-bo SHIM
CPC classification number: G11C16/3445 , G06F11/1068 , G11C7/1006 , G11C16/0483 , G11C16/14 , G11C16/26 , G11C29/021 , G11C29/025 , G11C29/028 , G11C29/50004 , G11C29/52 , G11C2029/0409
Abstract: A method for operating a non-volatile memory device initially includes supplying an erase voltage to the memory cells. The memory cells are in cell strings in a three-dimensional structure. The method further includes performing a first read operation of the memory cells, performing a second read operation of the memory cells, and then performing a first erase verify operation based on results of the first and second read operations. The first erase verify operation may include performing a first exclusive-or (XOR) operation on the first and second read operation results.
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