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    SEMICONDUCTOR DEVICES
    1.
    发明公开
    SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：US20230387237A1

    公开(公告)日：2023-11-30

    申请号：US18449734

    申请日：2023-08-15

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： MYUNG GIL KANG ,  Dong Won Kim ,  Woo Seok Park ,  Keun Hwi Cho ,  Sung Gi Hur

    IPC: H01L29/423 ,  H01L27/092 ,  H01L29/06 ,  H01L29/786

    CPC classification number: H01L29/42392 ,  H01L27/092 ,  H01L29/0665 ,  H01L29/78696 ,  H01L29/4236

    Abstract: Semiconductor devices include a first active pattern including a first lower pattern extending in a first direction and a first sheet pattern spaced apart from the first lower pattern; and a first gate electrode on the first lower pattern, the first gate electrode extending in a second direction and surrounding the first sheet pattern, wherein the first lower pattern includes a first sidewall and a second sidewall opposite to each other, each of the first sidewall of the first lower pattern and the second sidewall of the first lower pattern extends in the first direction, the first gate electrode overlaps the first sidewall of the first lower pattern in the second direction by a first depth, the first gate electrode overlaps the second sidewall of the first lower pattern in the second direction by a second depth, and the first depth is different from the second depth.

    Semiconductor device and method of fabricating the same
    3.
    发明授权
    Semiconductor device and method of fabricating the same 有权
    半导体装置及其制造方法

    公开(公告)号：US09466601B2

    公开(公告)日：2016-10-11

    申请号：US14274861

    申请日：2014-05-12

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Junggil Yang ,  Sangsu Kim ,  TaeYong Kwon ,  Sung Gi Hur

    IPC: H01L27/092 ,  H01L21/8238

    CPC classification number: H01L27/0924 ,  H01L21/30604 ,  H01L21/30612 ,  H01L21/823807 ,  H01L21/823821 ,  H01L27/0922 ,  H01L29/1054 ,  H01L29/42392

    Abstract: A semiconductor device includes a substrate including first and second regions, a first transistor provided on the first region to include a first channel region protruding from the substrate, and a second transistor provided on the second region to include a second channel region and a gate electrode extending between the substrate and the second channel region. The first channel region may include a lower semiconductor pattern containing a different material from the second channel region and an upper semiconductor pattern containing the same material as the second channel region.

    Abstract translation: 半导体器件包括包括第一和第二区域的衬底，第一晶体管，设置在第一区域上，以包括从衬底突出的第一沟道区域;以及第二晶体管，设置在第二区域上以包括第二沟道区域和栅电极 在衬底和第二沟道区之间延伸。 第一沟道区可以包括含有与第二沟道区不同的材料的下半导体图案和包含与第二沟道区相同的材料的上半导体图案。

    Semiconductor device
    4.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11901357B2

    公开(公告)日：2024-02-13

    申请号：US17380232

    申请日：2021-07-20

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Junggun You ,  Sung Gi Hur ,  Sungil Park ,  Wooseok Park ,  Seungmin Song

    IPC: H01L27/088

    CPC classification number: H01L27/088

    Abstract: A semiconductor device including a substrate that includes first and second regions; a first active pattern on the first region, the first active pattern including first source/drain patterns and a first channel pattern between the first source/drain patterns; a second active pattern on the second region, the second active pattern including second source/drain patterns and a second channel pattern between the second source/drain patterns; and a first gate electrode on the first channel pattern and a second gate electrode on the second channel pattern, wherein a length of the first channel pattern is greater than a length of the second channel pattern, each of the first channel pattern and the second channel pattern includes a plurality of semiconductor patterns stacked on the substrate, and at least two semiconductor patterns of the first channel pattern are bent away from or toward a bottom surface of the substrate.

    Semiconductor devices
    5.
    发明授权
    Semiconductor devices 有权
    半导体器件

    公开(公告)号：US09362397B2

    公开(公告)日：2016-06-07

    申请号：US14464785

    申请日：2014-08-21

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sung Gi Hur ,  Sangsu Kim ,  Junggil Yang ,  Changjae Yang ,  Dongkyu Lee

    IPC: H01L29/78 ,  H01L29/66 ,  H01L29/12

    CPC classification number: H01L29/7832 ,  H01L27/1104 ,  H01L29/12 ,  H01L29/66484 ,  H01L29/66787 ,  H01L29/7831

    Abstract: A gate-all-around (GAA) semiconductor device can include a fin structure that includes alternatingly layered first and second semiconductor patterns. A source region can extend into the alternatingly layered first and second semiconductor patterns and a drain region can extend into the alternatingly layered first and second semiconductor patterns. A gate electrode can extend between the source region and the drain region and surround channel portions of the second semiconductor patterns between the source region and the drain region to define gaps between the source and drain regions. A semiconductor oxide can be on first side walls of the gap that face the source and drain regions and can be absent from at least one of second side walls of the gaps that face the second semiconductor patterns. A gate insulating layer can be on the first side walls of the gaps between the gate electrode and the semiconductor oxide.

    Abstract translation: 栅极全能（GAA）半导体器件可以包括鳍结构，其包括交替分层的第一和第二半导体图案。 源极区域可以延伸到交替层叠的第一和第二半导体图案中，并且漏极区域可以延伸到交替层叠的第一和第二半导体图案中。 栅电极可以在源极区域和漏极区域之间延伸并且围绕源极区域和漏极区域之间的第二半导体图案的通道部分，以限定源极和漏极区域之间的间隙。 半导体氧化物可以位于与源极和漏极区域相对的间隙的第一侧壁上，并且可以不存在面对第二半导体图案的间隙的第二侧壁中的至少一个。 栅极绝缘层可以位于栅电极和半导体氧化物之间的间隙的第一侧壁上。

    SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME
    6.
    发明申请
    SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20150084041A1

    公开(公告)日：2015-03-26

    申请号：US14464785

    申请日：2014-08-21

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sung Gi Hur ,  Sangsu Kim ,  Junggil Yang ,  Changjae Yang ,  Dongkyu Lee

    IPC: H01L29/78 ,  H01L29/66 ,  H01L29/12

    CPC classification number: H01L29/7832 ,  H01L27/1104 ,  H01L29/12 ,  H01L29/66484 ,  H01L29/66787 ,  H01L29/7831

    Abstract: A gate-all-around (GAA) semiconductor device can include a fin structure that includes alternatingly layered first and second semiconductor patterns. A source region can extend into the alternatingly layered first and second semiconductor patterns and a drain region can extend into the alternatingly layered first and second semiconductor patterns. A gate electrode can extend between the source region and the drain region and surround channel portions of the second semiconductor patterns between the source region and the drain region to define gaps between the source and drain regions. A semiconductor oxide can be on first side walls of the gap that face the source and drain regions and can be absent from at least one of second side walls of the gaps that face the second semiconductor patterns. A gate insulating layer can be on the first side walls of the gaps between the gate electrode and the semiconductor oxide.

    Abstract translation: 栅极全能（GAA）半导体器件可以包括鳍结构，其包括交替分层的第一和第二半导体图案。 源极区域可以延伸到交替层叠的第一和第二半导体图案中，并且漏极区域可以延伸到交替层叠的第一和第二半导体图案中。 栅电极可以在源极区域和漏极区域之间延伸并且围绕源极区域和漏极区域之间的第二半导体图案的通道部分，以限定源极和漏极区域之间的间隙。 半导体氧化物可以位于与源极和漏极区域相对的间隙的第一侧壁上，并且可以不存在面对第二半导体图案的间隙的第二侧壁中的至少一个。 栅极绝缘层可以位于栅电极和半导体氧化物之间的间隙的第一侧壁上。

    Semiconductor devices
    7.
    发明授权
    Semiconductor devices 有权

    公开(公告)号：US12183800B2

    公开(公告)日：2024-12-31

    申请号：US18449734

    申请日：2023-08-15

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Myung Gil Kang ,  Dong Won Kim ,  Woo Seok Park ,  Keun Hwi Cho ,  Sung Gi Hur

    IPC: H01L29/423 ,  H01L27/092 ,  H01L29/06 ,  H01L29/786

    Abstract: Semiconductor devices include a first active pattern including a first lower pattern extending in a first direction and a first sheet pattern spaced apart from the first lower pattern; and a first gate electrode on the first lower pattern, the first gate electrode extending in a second direction and surrounding the first sheet pattern, wherein the first lower pattern includes a first sidewall and a second sidewall opposite to each other, each of the first sidewall of the first lower pattern and the second sidewall of the first lower pattern extends in the first direction, the first gate electrode overlaps the first sidewall of the first lower pattern in the second direction by a first depth, the first gate electrode overlaps the second sidewall of the first lower pattern in the second direction by a second depth, and the first depth is different from the second depth.

    SEMICONDUCTOR DEVICES
    8.
    发明申请
    SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20240421212A1

    公开(公告)日：2024-12-19

    申请号：US18642987

    申请日：2024-04-23

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Woo Seok Park ,  Jae Ho Jeon ,  Sung Gi Hur

    IPC: H01L29/66 ,  H01L29/06

    Abstract: There is provided a semiconductor device capable of improving element performance and reliability. The semiconductor device may include an active pattern that includes a lower pattern extending in a first direction on a substrate and a sheet pattern on the lower pattern, a field insulating layer that defines the active pattern on the substrate, a gate structure on the lower pattern and including a gate insulating layer and a gate electrode, the gate electrode extending in a second direction perpendicular to the first direction, a gate spacer at least partially surrounding the gate structure and including a first portion on a sidewall of the gate structure and a second portion on a bottom surface of the gate structure, and a source/drain pattern on the lower pattern and in contact with the sheet pattern.

    Semiconductor device and method of fabricating the same
    10.
    发明授权
    Semiconductor device and method of fabricating the same 有权

    公开(公告)号：US12063767B2

    公开(公告)日：2024-08-13

    申请号：US17541790

    申请日：2021-12-03

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Myung Gil Kang ,  Seunghun Lee ,  Sangdeok Kwon ,  Keun Hwi Cho ,  Sung Gi Hur

    IPC: H01L27/11 ,  H01L29/36 ,  H01L29/423 ,  H01L29/786 ,  H10B10/00

    CPC classification number: H10B10/12 ,  H01L29/42392 ,  H01L29/78618 ,  H01L29/78696

    Abstract: A semiconductor device includes a first active pattern on a substrate, a pair of first source/drain patterns on the first active pattern and a first channel pattern between the pair of first source/drain patterns, wherein the first channel pattern includes a plurality of semiconductor patterns that are stacked and spaced apart from each other, a first gate electrode on the first channel pattern, a first gate cutting pattern that is adjacent to the first channel pattern and penetrates the first gate electrode, and a first residual pattern between the first gate cutting pattern and the first channel pattern. The first residual pattern covers an outermost sidewall of at least one semiconductor pattern of the plurality of semiconductor patterns of the first channel pattern. The first gate electrode includes, on an upper portion of the first gate electrode, a first extension that vertically overlaps the first residual pattern.

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