公开(公告)号：US20130105946A1

公开(公告)日：2013-05-02

申请号：US13593210

申请日：2012-08-23

申请人： Sang-moon LEE ,  Jai-kwang SHIN ,  Young-jin CHO

发明人： Sang-moon LEE ,  Jai-kwang SHIN ,  Young-jin CHO

IPC分类号： H01L29/20 ,  H01L21/20

CPC分类号： H01L21/02381 ,  H01L21/02538 ,  H01L21/02546 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02647 ,  H01L29/785 ,  Y02E10/544 ,  Y02P70/521

摘要： A semiconductor device may include a silicon (Si) substrate including a hole, a hard mask around the hole on the Si substrate, a first material layer filling the hole and on a portion of the hard mask, an upper material layer on the first material layer, and a device layer on the upper material layer. The first material layer may be a Group III-V material layer. The Group III-V material layer may be a Group III-V compound semiconductor layer. The upper material layer may be a portion of the first material layer. The upper material layer may include one of a same material as the first material layer and a different material from the first material layer.

摘要翻译： 半导体器件可以包括包括孔的硅（Si）衬底，围绕Si衬底上的孔的硬掩模，填充该孔的第一材料层和硬掩模的一部分上的第一材料层，第一材料上的上部材料层 层和上层材料层上的器件层。 第一材料层可以是III-V族材料层。 III-V族材料层可以是III-V族化合物半导体层。 上部材料层可以是第一材料层的一部分。 上部材料层可以包括与第一材料层相同的材料和与第一材料层不同的材料之一。

公开(公告)号：US20150200285A1

公开(公告)日：2015-07-16

申请号：US14623394

申请日：2015-02-16

申请人： Young-jin CHO ,  Kyoung-yeon KIM ,  Sang-moon LEE ,  Ki-ha HONG ,  Eui-chul HWANG

发明人： Young-jin CHO ,  Kyoung-yeon KIM ,  Sang-moon LEE ,  Ki-ha HONG ,  Eui-chul HWANG

IPC分类号： H01L29/778 ,  H01L29/78 ,  H01L29/66

CPC分类号： H01L29/7784 ,  H01L21/02538 ,  H01L29/122 ,  H01L29/127 ,  H01L29/158 ,  H01L29/20 ,  H01L29/205 ,  H01L29/42376 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/66522 ,  H01L29/66795 ,  H01L29/7783 ,  H01L29/7787 ,  H01L29/785

摘要： A semiconductor device including a group III-V barrier and a method of manufacturing the semiconductor device, the semiconductor device including: a substrate, insulation layers formed to be spaced apart on the substrate, a group III-V material layer for filling the space between the insulation layers and having a portion protruding higher than the insulation layers, a barrier layer for covering the side and upper surfaces of the protruding portion of the group III-V material layer and having a bandgap larger than that of the group III-V material layer, a gate insulation film for covering the surface of the barrier layer, a gate electrode formed on the gate insulation film, and source and drain electrodes formed apart from the gate electrode. The overall composition of the group III-V material layer is uniform. The barrier layer may include a group III-V material for forming a quantum well.

摘要翻译： 一种包括III-V族阻挡层的半导体器件和制造半导体器件的方法，所述半导体器件包括：衬底，形成为在衬底上间隔开的绝缘层，用于填充所述衬底之间的空间的III-V族材料层 所述绝缘层具有比所述绝缘层突出的部分，用于覆盖所述III-V族材料层的所述突出部分的侧表面和上表面的阻挡层，并且具有比所述III-V族材料的带隙大的带隙 层，用于覆盖势垒层的表面的栅极绝缘膜，形成在栅极绝缘膜上的栅电极，以及与栅电极分开形成的源极和漏极。 III-V族材料层的总体组成是均匀的。 阻挡层可以包括用于形成量子阱的III-V族材料。

公开(公告)号：US20150303114A1

公开(公告)日：2015-10-22

申请号：US14790391

申请日：2015-07-02

申请人： Sang-moon LEE ,  Young-jin CHO

发明人： Sang-moon LEE ,  Young-jin CHO

IPC分类号： H01L21/8258 ,  H01L29/20 ,  H01L21/8238 ,  H01L21/306 ,  H01L27/06 ,  H01L21/02 ,  H01L27/092 ,  H01L29/16

CPC分类号： H01L21/8258 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02538 ,  H01L21/30625 ,  H01L21/8238 ,  H01L27/0605 ,  H01L27/092 ,  H01L27/0922 ,  H01L27/15 ,  H01L29/16 ,  H01L29/20 ,  H01L29/267

摘要： A complementary metal oxide semiconductor (CMOS) device includes an n-type first transistor on a silicon substrate, the n-type first transistor including a Group III-V compound semiconductor substrate, and a p-type second transistor on the silicon substrate, the p-type second transistor including a germanium based substrate.

摘要翻译： 互补金属氧化物半导体（CMOS）器件包括在硅衬底上的n型第一晶体管，n型第一晶体管包括III-V族化合物半导体衬底和在硅衬底上的p型第二晶体管， p型第二晶体管，包括基于锗的衬底。

公开(公告)号：US20150255592A1

公开(公告)日：2015-09-10

申请号：US14718968

申请日：2015-05-21

申请人： Young-jin CHO ,  Kyoung-yeon KIM ,  Sang-moon LEE ,  Ki-ha HONG ,  Eui-chul HWANG

发明人： Young-jin CHO ,  Kyoung-yeon KIM ,  Sang-moon LEE ,  Ki-ha HONG ,  Eui-chul HWANG

IPC分类号： H01L29/778 ,  H01L21/02 ,  H01L29/66 ,  H01L29/12 ,  H01L29/20

CPC分类号： H01L29/7784 ,  H01L21/02538 ,  H01L29/122 ,  H01L29/127 ,  H01L29/158 ,  H01L29/20 ,  H01L29/205 ,  H01L29/42376 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/66522 ,  H01L29/66795 ,  H01L29/7783 ,  H01L29/7787 ,  H01L29/785

摘要： A semiconductor device including a group III-V barrier and a method of manufacturing the semiconductor device, the semiconductor device including: a substrate, insulation layers formed to be spaced apart on the substrate, a group III-V material layer for filling the space between the insulation layers and having a portion protruding higher than the insulation layers, a barrier layer for covering the side and upper surfaces of the protruding portion of the group III-V material layer and having a bandgap larger than that of the group III-V material layer, a gate insulation film for covering the surface of the barrier layer, a gate electrode formed on the gate insulation film, and source and drain electrodes formed apart from the gate electrode. The overall composition of the group III-V material layer is uniform. The barrier layer may include a group III-V material for forming a quantum well.

公开(公告)号：US20160197161A1

公开(公告)日：2016-07-07

申请号：US15069148

申请日：2016-03-14

申请人： Young-jin CHO ,  Kyoung-yeon KIM ,  Sang-moon LEE ,  Ki-ha HONG ,  Eui-chul HWANG

发明人： Young-jin CHO ,  Kyoung-yeon KIM ,  Sang-moon LEE ,  Ki-ha HONG ,  Eui-chul HWANG

IPC分类号： H01L29/66 ,  H01L29/423 ,  H01L29/12

CPC分类号： H01L29/7784 ,  H01L21/02538 ,  H01L29/122 ,  H01L29/127 ,  H01L29/158 ,  H01L29/20 ,  H01L29/205 ,  H01L29/42376 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/66522 ,  H01L29/66795 ,  H01L29/7783 ,  H01L29/7787 ,  H01L29/785

摘要： A semiconductor device including a group III-V barrier and a method of manufacturing the semiconductor device, the semiconductor device including: a substrate, insulation layers formed to be spaced apart on the substrate, a group III-V material layer for filling the space between the insulation layers and having a portion protruding higher than the insulation layers, a barrier layer for covering the side and upper surfaces of the protruding portion of the group III-V material layer and having a bandgap larger than that of the group III-V material layer, a gate insulation film for covering the surface of the barrier layer, a gate electrode formed on the gate insulation film, and source and drain electrodes formed apart from the gate electrode. The overall composition of the group III-V material layer is uniform. The barrier layer may include a group III-V material for forming a quantum well.

公开(公告)号：US20130119347A1

公开(公告)日：2013-05-16

申请号：US13611127

申请日：2012-09-12

申请人： Young-jin CHO ,  Kyoung-yeon KIM ,  Sang-moon LEE ,  Ki-ha HONG ,  Eui-chul HWANG

发明人： Young-jin CHO ,  Kyoung-yeon KIM ,  Sang-moon LEE ,  Ki-ha HONG ,  Eui-chul HWANG

IPC分类号： H01L21/335 ,  H01L29/775

CPC分类号： H01L29/7784 ,  H01L21/02538 ,  H01L29/122 ,  H01L29/127 ,  H01L29/158 ,  H01L29/20 ,  H01L29/205 ,  H01L29/42376 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/66522 ,  H01L29/66795 ,  H01L29/7783 ,  H01L29/7787 ,  H01L29/785

摘要： A semiconductor device including a group III-V barrier and a method of manufacturing the semiconductor device, the semiconductor device including: a substrate, insulation layers formed to be spaced apart on the substrate, a group III-V material layer for filling the space between the insulation layers and having a portion protruding higher than the insulation layers, a barrier layer for covering the side and upper surfaces of the protruding portion of the group III-V material layer and having a bandgap larger than that of the group III-V material layer, a gate insulation film for covering the surface of the barrier layer, a gate electrode formed on the gate insulation film, and source and drain electrodes formed apart from the gate electrode. The overall composition of the group III-V material layer is uniform. The barrier layer may include a group III-V material for forming a quantum well.

摘要翻译： 一种包括III-V族阻挡层的半导体器件和制造半导体器件的方法，所述半导体器件包括：衬底，形成为在衬底上间隔开的绝缘层，用于填充所述衬底之间的空间的III-V族材料层 所述绝缘层具有比所述绝缘层突出的部分，用于覆盖所述III-V族材料层的所述突出部分的侧表面和上表面的阻挡层，并且具有比所述III-V族材料的带隙大的带隙 层，用于覆盖势垒层的表面的栅极绝缘膜，形成在栅极绝缘膜上的栅电极，以及与栅电极分开形成的源极和漏极。 III-V族材料层的总体组成是均匀的。 阻挡层可以包括用于形成量子阱的III-V族材料。

公开(公告)号：US20130119507A1

公开(公告)日：2013-05-16

申请号：US13614303

申请日：2012-09-13

申请人： Sang-moon LEE ,  Young-jin CHO

发明人： Sang-moon LEE ,  Young-jin CHO

IPC分类号： H01L21/762 ,  H01L21/8234 ,  H01L27/00

CPC分类号： H01L21/823807 ,  H01L21/76224 ,  H01L21/8252 ,  H01L21/8258

摘要： Semiconductor devices using a group III-V material, and methods of manufacturing the same, include a substrate having a groove, a group III-V material layer filling in the groove and having a height the same as a height of the substrate, a first semiconductor device on the group III-V material layer, and a second semiconductor device on the substrate near the groove. The group III-V material layer is spaced apart from inner side surfaces of the groove.

摘要翻译： 使用III-V族材料的半导体器件及其制造方法包括：具有凹槽的衬底，填充在沟槽中的III-V族材料层，其高度与衬底的高度相同;第一 III-V族材料层上的半导体器件，以及靠近凹槽的衬底上的第二半导体器件。 III-V族材料层与槽的内侧表面间隔开。

公开(公告)号：US20130105869A1

公开(公告)日：2013-05-02

申请号：US13568555

申请日：2012-08-07

申请人： Sang-moon LEE ,  Young-jin CHO

发明人： Sang-moon LEE ,  Young-jin CHO

IPC分类号： H01L29/78 ,  H01L21/20 ,  H01L21/336

CPC分类号： H01L29/1033 ,  H01L29/42376 ,  H01L29/7787

摘要： A method of forming a group III-V material layer, a semiconductor device including the group III-V material layer, and a method of manufacturing the semiconductor device. The semiconductor device includes a substrate; a group III-V channel layer formed on the substrate; a gate insulating layer formed on the group III-V channel layer; and a gate electrode and source and drain electrodes formed on the gate insulating layer, the source and drain electrodes having intervals from the gate electrode, wherein voids exist between a lower portion of the group III-V channel layer and an insulating layer. The group III-V channel layer may include a binary, ternary, or quaternary material.

摘要翻译： 形成III-V族材料层的方法，包括III-V族材料层的半导体器件，以及制造半导体器件的方法。 半导体器件包括衬底; 形成在所述基板上的III-V沟道层; 形成在III-V沟道层上的栅极绝缘层; 以及形成在栅极绝缘层上的栅极电极和源极和漏极，源极和漏极具有与栅极电极的间隔，其中在III-V族沟道层的下部和绝缘层之间存在空隙。 III-V族沟道层可以包括二元，三元或四元材料。

公开(公告)号：US20150069517A1

公开(公告)日：2015-03-12

申请号：US14259569

申请日：2014-04-23

申请人： Moon-seung YANG ,  Mohammad Rakib UDDIN ,  Myoung-jae LEE ,  Sang-moon LEE ,  Sung-hun LEE ,  Seong-ho CHO

发明人： Moon-seung YANG ,  Mohammad Rakib UDDIN ,  Myoung-jae LEE ,  Sang-moon LEE ,  Sung-hun LEE ,  Seong-ho CHO

IPC分类号： H01L21/8238 ,  H01L27/092

CPC分类号： H01L21/8238 ,  H01L21/8252 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/092

摘要： Provided are a complementary metal oxide semiconductor (CMOS) device and a method of manufacturing the same. In the CMOS device, a buffer layer is disposed on a silicon substrate, and a first layer including a group III-V material is disposed on the buffer layer. A second layer including a group IV material is disposed on the buffer layer or the silicon substrate while being spaced apart from the first layer.

摘要翻译： 提供互补金属氧化物半导体（CMOS）器件及其制造方法。 在CMOS器件中，在硅衬底上设置缓冲层，并且在缓冲层上设置包括III-V族材料的第一层。 包含IV族材料的第二层设置在缓冲层或硅衬底上，同时与第一层间隔开。

公开(公告)号：US20160172450A1

公开(公告)日：2016-06-16

申请号：US15050867

申请日：2016-02-23

申请人： Dong-soo LEE ,  Myoung-jae LEE ,  Seong-ho CHO ,  Mohammad Rakib UDDIN ,  David SEO ,  Moon-seung YANG ,  Sang-moon LEE ,  Sung-hun LEE ,  Ji-hyun HUR ,  Eui-chul HWANG

发明人： Dong-soo LEE ,  Myoung-jae LEE ,  Seong-ho CHO ,  Mohammad Rakib UDDIN ,  David SEO ,  Moon-seung YANG ,  Sang-moon LEE ,  Sung-hun LEE ,  Ji-hyun HUR ,  Eui-chul HWANG

IPC分类号： H01L29/34 ,  H01L21/322

CPC分类号： H01L29/34 ,  H01L21/02175 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/022 ,  H01L21/02304 ,  H01L21/28158 ,  H01L21/28264 ,  H01L21/322 ,  H01L21/3228 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/24 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66522 ,  H01L29/7851

摘要： The present disclosure relates to a semiconductor device including an oxygen gettering layer between a group III-V compound semiconductor layer and a dielectric layer, and a method of fabricating the semiconductor device. The semiconductor device may include a compound semiconductor layer; a dielectric layer disposed on the compound semiconductor layer; and an oxygen gettering layer interposed between the compound semiconductor layer and the dielectric layer. The oxygen gettering layer includes a material having a higher oxygen affinity than a material of the compound semiconductor layer.