Virtual machine control structure identification decoder
    1.
    发明授权
    Virtual machine control structure identification decoder 有权
    虚拟机控制结构识别解码器

    公开(公告)号:US08205032B2

    公开(公告)日:2012-06-19

    申请号:US13069690

    申请日:2011-03-23

    IPC分类号: G06F12/00 G06F13/00 G06F13/18

    摘要: Embodiments of apparatuses, methods, and systems for decoding a virtual machine control structure identification are disclosed. In one embodiment, an apparatus includes a virtual machine control structure to decode a virtual machine control structure identification data. The virtual machine control structure identification data is decoded into an address of a virtual machine control structure field and an offset. The offset is to help identify a micro-operation associated with a virtual machine architecture instruction to be executed.

    摘要翻译: 公开了用于解码虚拟机控制结构标识的装置,方法和系统的实施例。 在一个实施例中,一种装置包括用于解码虚拟机控制结构标识数据的虚拟机控制结构。 虚拟机控制结构识别数据被解码成虚拟机控制结构字段的地址和偏移量。 补偿是帮助识别与要执行的虚拟机架构指令相关的微操作。

    Virtual Machine Control Structure Identification Decoder
    2.
    发明申请
    Virtual Machine Control Structure Identification Decoder 有权
    虚拟机控制结构识别解码器

    公开(公告)号:US20110173613A1

    公开(公告)日:2011-07-14

    申请号:US13069690

    申请日:2011-03-23

    IPC分类号: G06F9/455

    摘要: Embodiments of apparatuses, methods, and systems for decoding a virtual machine control structure identification are disclosed. In one embodiment, an apparatus includes a virtual machine control structure to decode a virtual machine control structure identification data. The virtual machine control structure identification data is decoded into an address of a virtual machine control structure field and an offset. The offset is to help identify a micro-operation associated with a virtual machine architecture instruction to be executed.

    摘要翻译: 公开了用于解码虚拟机控制结构标识的装置,方法和系统的实施例。 在一个实施例中,一种装置包括用于解码虚拟机控制结构标识数据的虚拟机控制结构。 虚拟机控制结构识别数据被解码成虚拟机控制结构字段的地址和偏移量。 补偿是帮助识别与要执行的虚拟机架构指令相关的微操作。

    Method and apparatus for decoding a virtual machine control structure identification
    3.
    发明授权
    Method and apparatus for decoding a virtual machine control structure identification 有权
    用于解码虚拟机控制结构标识的方法和装置

    公开(公告)号:US07937525B2

    公开(公告)日:2011-05-03

    申请号:US10876509

    申请日:2004-06-25

    IPC分类号: G06F12/00 G06F13/00 G06F13/28

    摘要: Embodiments of apparatuses, methods, and systems for decoding a virtual machine control structure identification are disclosed. In one embodiment, an apparatus includes a virtual machine control structure to decode a virtual machine control structure identification data. The virtual machine control structure identification data is decoded into an address of a virtual machine control structure field and an offset. The offset is to help identify a micro-operation associated with a virtual machine architecture instruction to be executed.

    摘要翻译: 公开了用于解码虚拟机控制结构标识的装置,方法和系统的实施例。 在一个实施例中,一种装置包括用于解码虚拟机控制结构标识数据的虚拟机控制结构。 虚拟机控制结构识别数据被解码为虚拟机控制结构字段的地址和偏移量。 补偿是帮助识别与要执行的虚拟机架构指令相关的微操作。

    Method and apparatus for accessing physical memory from a CPU or processing element in a high performance manner
    5.
    发明授权
    Method and apparatus for accessing physical memory from a CPU or processing element in a high performance manner 有权
    用于以高性能方式从CPU或处理元件访问物理存储器的方法和装置

    公开(公告)号:US09280473B2

    公开(公告)日:2016-03-08

    申请号:US11004753

    申请日:2004-12-02

    IPC分类号: G06F12/08 G06F9/30 G06F12/10

    摘要: A method and apparatus is described herein for accessing a physical memory location referenced by a physical address with a processor. The processor fetches/receives instructions with references to virtual memory addresses and/or references to physical addresses. Translation logic translates the virtual memory addresses to physical addresses and provides the physical addresses to a common interface. Physical addressing logic decodes references to physical addresses and provides the physical addresses to a common interface based on a memory type stored by the physical addressing logic.

    摘要翻译: 本文描述了一种用于访问由处理器引用的物理地址的物理存储器位置的方法和装置。 处理器通过引用虚拟内存地址和/或对物理地址的引用来获取/接收指令。 翻译逻辑将虚拟内存地址转换为物理地址,并将物理地址提供给公共接口。 物理寻址逻辑解码对物理地址的引用,并根据物理寻址逻辑存储的存储器类型将物理地址提供给公共接口。

    Single stepping a virtual machine guest using a reorder buffer
    10.
    发明授权
    Single stepping a virtual machine guest using a reorder buffer 有权
    使用重新排序缓冲区单步执行虚拟机访客

    公开(公告)号:US07370181B2

    公开(公告)日:2008-05-06

    申请号:US10876092

    申请日:2004-06-22

    IPC分类号: G06F7/38 G06F9/00 G06F9/44

    摘要: Embodiments of apparatuses, systems, and methods for single stepping a virtual machine guest using a reorder buffer are disclosed. In one embodiment, an apparatus includes a sequencer and a reorder buffer. The sequencer is to issue micro-operations. The reorder buffer is to signal the sequencer to signal the sequencer to issue micro-operations corresponding to a monitor trap flag event.

    摘要翻译: 公开了使用重排序缓冲器来单步执行虚拟机访客的装置,系统和方法的实施例。 在一个实施例中,一种装置包括定序器和重排序缓冲器。 序列器将发布微操作。 重排序缓冲器是用信号通知序列发生器发出与监视器陷阱标志事件相对应的微操作的定序器。