Semiconductor package structures and methods of manufacture

    公开(公告)号:US11217515B2

    公开(公告)日:2022-01-04

    申请号:US16554980

    申请日:2019-08-29

    摘要: Methods of forming semiconductor packages include providing a lead frame having leads and no tie-bars. Tape is attached to the lead frame and one or more semiconductor die are coupled therewith. Electrical contacts of the die are interconnected with the leads using electrical connectors. An encapsulated assembly is formed by at least partially encapsulating the die and electrical connectors. The assembly is singulated to form a semiconductor package. The tape is detached from the package or encapsulated assembly. One or more die attach flags may be attached to the tape and the die may be attached thereto. Semiconductor packages formed using the methods include one or more semiconductor die at least partially encapsulated, pins exposed through the encapsulant, electrical connectors within the encapsulant and electrically interconnecting the pins with electrical contacts of the die, and no tie-bars coupling the die with the pins. Packages may also include die attach flags.

    SINGLE OR MULTI CHIP MODULE PACKAGE AND RELATED METHODS

    公开(公告)号:US20180096925A1

    公开(公告)日:2018-04-05

    申请号:US15833533

    申请日:2017-12-06

    摘要: Implementations of a semiconductor device package may include: a plurality of electrical contacts on a first face of a die, at least one clip electrically and mechanically coupled with at least one electrical contact on a second face of the die where the second face of the die is on an opposing side of the die from the first face of the die. The at least one clip may include at least one lead in electrical communication with the at least one electrical contact on the second face of the die. A mold compound or an encapsulating compound may be included around the die and a majority of the at least one clip where a portion of the at least one lead and a portion of the plurality of electrical contacts on the first face of the die are not overmolded or encapsulated. The semiconductor package includes no lead frame.

    Single or multi chip module package and related methods

    公开(公告)号:US10522448B2

    公开(公告)日:2019-12-31

    申请号:US15833533

    申请日:2017-12-06

    摘要: Implementations of a semiconductor device package may include: a plurality of electrical contacts on a first face of a die, at least one clip electrically and mechanically coupled with at least one electrical contact on a second face of the die where the second face of the die is on an opposing side of the die from the first face of the die. The at least one clip may include at least one lead in electrical communication with the at least one electrical contact on the second face of the die. A mold compound or an encapsulating compound may be included around the die and a majority of the at least one clip where a portion of the at least one lead and a portion of the plurality of electrical contacts on the first face of the die are not overmolded or encapsulated. The semiconductor package includes no lead frame.

    Single or multi chip module package and related methods
    10.
    发明授权
    Single or multi chip module package and related methods 有权
    单芯片或多芯片模块封装及相关方法

    公开(公告)号:US09558968B2

    公开(公告)日:2017-01-31

    申请号:US14484141

    申请日:2014-09-11

    摘要: A method of forming a semiconductor device package. Implementations may include providing an adhesive tape; contacting at least one electrical contact of at least one die with an adhesive surface of the adhesive tape; mechanically and electrically coupling at least one clip with the at least one die and contacting an electrical contact of the at least one clip with the adhesive surface; one of overmolding and encapsulating the at least one die and a majority of the at least one clip with one of a mold compound and an encapsulating compound, respectively, wherein the at least one electrical contact of the at least one die and the electrical contact of the at least one clip are not one of overmolded and encapsulated, forming the semiconductor device package; removing the semiconductor device package from the adhesive surface; and including no leadframe in the package.

    摘要翻译: 一种形成半导体器件封装的方法。 实施方案可以包括提供胶带; 使至少一个模具的至少一个电触头与所述胶带的粘合表面接触; 将至少一个夹子与所述至少一个模具机械和电耦合并且使所述至少一个夹子的电接触与所述粘合剂表面接触; 分别将模具化合物和封装化合物之一分别包覆成型并包封至少一个模头和至少一个夹子的大部分,其中至少一个模具和电触头的至少一个电触点 所述至少一个夹子不是包覆成型和封装的夹子,形成所述半导体器件封装; 从粘合剂表面去除半导体器件封装; 并且在包装中不包括引线框架。