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公开(公告)号：US08300088B2
公开(公告)日：2012-10-30
申请号：US12585745
申请日：2009-09-23
CPC分类号： H04N5/3696 , H04N5/347 , H04N13/25
摘要： A three-dimensional (3D) image sensor includes a plurality of color pixels, and a plurality of distance measuring pixels. Where the plurality of color pixels and the plurality of distance measuring pixels are arranged in an array, and a group of distance measuring pixels, from among the plurality of distance measuring pixels, are disposed so that a corner of each distance measuring pixel in the group of distance-measuring pixels is adjacent to a corner of an adjacent distance-measuring pixel in the group of distance-measuring pixels. The group of distance measuring pixels is capable of jointly outputting one distance measurement signal.
摘要翻译： 三维（3D）图像传感器包括多个彩色像素和多个距离测量像素。 在多个彩色像素和多个距离测量像素排列成阵列的情况下，并且从多个距离测量像素之中设置一组距离测量像素，使得组中的每个距离测量像素的角部 距离测量像素的距离测量像素组中的相邻距离测量像素的角部相邻。 距离测量像素组能够共同输出一个距离测量信号。
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公开(公告)号：US20100073462A1
公开(公告)日：2010-03-25
申请号：US12585745
申请日：2009-09-23
IPC分类号： H04N13/02
CPC分类号： H04N5/3696 , H04N5/347 , H04N13/25
摘要： A three-dimensional (3D) image sensor includes a plurality of color pixels, and a plurality of distance measuring pixels. Where the plurality of color pixels and the plurality of distance measuring pixels are arranged in an array, and a group of distance measuring pixels, from among the plurality of distance measuring pixels, are disposed so that a corner of each distance measuring pixel in the group of distance-measuring pixels is adjacent to a corner of an adjacent distance-measuring pixel in the group of distance-measuring pixels. The group of distance measuring pixels is capable of jointly outputting one distance measurement signal.
摘要翻译： 三维（3D）图像传感器包括多个彩色像素和多个距离测量像素。 在多个彩色像素和多个距离测量像素排列成阵列的情况下，并且从多个距离测量像素之中设置一组距离测量像素，使得组中的每个距离测量像素的角部 距离测量像素的距离测量像素组中的相邻距离测量像素的角部相邻。 距离测量像素组能够共同输出一个距离测量信号。
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3.发明授权Method of writing/reading data into/from memory cell and page buffer using different codes for writing and reading operations 有权使用不同的代码进行写入和读取操作，从存储单元和页面缓冲区写入/读取数据的方法公开(公告)号：US07729175B2
公开(公告)日：2010-06-01
申请号：US12010481
申请日：2008-01-25
申请人： Kyoung-lae Cho , Yoon-dong Park , Jun-jin Kong , Seung-hoon Lee , Jae-woong Hyun , Sung-jae Byun , Ju-hee Park , Seung-hwan Song
发明人： Kyoung-lae Cho , Yoon-dong Park , Jun-jin Kong , Seung-hoon Lee , Jae-woong Hyun , Sung-jae Byun , Ju-hee Park , Seung-hwan Song
IPC分类号： G11C11/34
CPC分类号： G11C16/10 , G11C7/1006 , G11C11/5628 , G11C11/5642 , G11C2211/5642
摘要： Provided are a method of writing/reading data into/from a memory cell and a page buffer using different codes for the writing and reading operations. The method of writing/reading data into/from a memory cell that has a plurality of threshold voltage distributions includes a data writing operation and a data reading operation. In the data writing operation, data having a plurality of bits is written into the memory cell by using a plurality of writing codes corresponding to threshold voltage distributions. In the data reading operation, the data having a plurality of bits is read from the memory cell by using reading codes corresponding to the threshold voltage distributions from among the threshold voltage distributions. In the method of writing/reading data into/from a memory cell, a part of the writing codes is different from a corresponding part of the reading codes.
摘要翻译： 提供了一种将数据写入/从存储单元读取数据的方法和使用不同代码进行写入和读取操作的页面缓冲器。 对具有多个阈值电压分布的存储单元写入/读取数据的方法包括数据写入操作和数据读取操作。 在数据写入操作中，通过使用与阈值电压分布对应的多个写入代码，将具有多个位的数据写入存储单元。 在数据读取操作中，通过使用与阈值电压分布中的阈值电压分布相对应的读取代码，从存储单元读取具有多个位的数据。 在将数据写入/从存储单元读取的方法中，写入代码的一部分与读取代码的相应部分不同。
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公开(公告)号：US07885107B2
公开(公告)日：2011-02-08
申请号：US12219663
申请日：2008-07-25
申请人： Ju-hee Park , Young-moon Kim , Yoon-dong Park , Seung-hoon Lee , Kyoung-lae Cho , Sung-jae Byun , Seung-hwan Song
发明人： Ju-hee Park , Young-moon Kim , Yoon-dong Park , Seung-hoon Lee , Kyoung-lae Cho , Sung-jae Byun , Seung-hwan Song
CPC分类号： G11C11/5628 , G11C2211/5621 , G11C2211/5648
摘要： A method of programming a non-volatile memory cell includes programming a first bit of multi-bit data by setting a threshold voltage of the non-volatile memory cell to a first voltage level within a first of a plurality of threshold voltage distributions. A second bit of the multi-bit data is programmed by setting the threshold voltage to a second voltage level based on a value of the second bit. The second voltage level is the same as the first voltage level if the second bit is a first value and the second voltage level is within a second of the plurality of threshold voltage distributions if the second bit is a second value. A third bit of the multi-bit data is programmed by setting the threshold voltage to a third voltage level based on a value of the third bit.
摘要翻译： 一种编程非易失性存储单元的方法包括通过将非易失性存储单元的阈值电压设置为多个阈值电压分布中的第一个内的第一电压电平来对第一位多位数据进行编程。 通过基于第二位的值将阈值电压设置为第二电压电平来编程多位数据的第二位。 如果第二位是第二值，则第二电压电平与第一电压电平相同，如果第二位是第二值，则第二电压电平在多个阈值电压分布的一秒内。 通过将阈值电压设置为基于第三位的值的第三电压电平来编程多位数据的第三位。
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5.发明申请Method of writing/reading data into/from memory cell and page buffer using different codes for writing and reading operations 有权使用不同的代码进行写入和读取操作，从存储单元和页面缓冲区写入/读取数据的方法公开(公告)号：US20080285352A1
公开(公告)日：2008-11-20
申请号：US12010481
申请日：2008-01-25
申请人： Kyoung-lae Cho , Yoon-dong Park , Jun-jin Kong , Seung-hoon Lee , Jae-woong Hyun , Sung-jae Byun , Ju-hee Park , Seung-hwan Song
发明人： Kyoung-lae Cho , Yoon-dong Park , Jun-jin Kong , Seung-hoon Lee , Jae-woong Hyun , Sung-jae Byun , Ju-hee Park , Seung-hwan Song
IPC分类号： G11C16/06
CPC分类号： G11C16/10 , G11C7/1006 , G11C11/5628 , G11C11/5642 , G11C2211/5642
摘要： Provided are a method of writing/reading data into/from a memory cell and a page buffer using different codes for the writing and reading operations. The method of writing/reading data into/from a memory cell that has a plurality of threshold voltage distributions includes a data writing operation and a data reading operation. In the data writing operation, data having a plurality of bits is written into the memory cell by using a plurality of writing codes corresponding to threshold voltage distributions. In the data reading operation, the data having a plurality of bits is read from the memory cell by using reading codes corresponding to the threshold voltage distributions from among the threshold voltage distributions. In the method of writing/reading data into/from a memory cell, a part of the writing codes is different from a corresponding part of the reading codes.
摘要翻译： 提供了一种将数据写入/从存储单元读取数据的方法和使用不同代码进行写入和读取操作的页面缓冲器。 对具有多个阈值电压分布的存储单元写入/读取数据的方法包括数据写入操作和数据读取操作。 在数据写入操作中，通过使用与阈值电压分布对应的多个写入代码，将具有多个位的数据写入存储单元。 在数据读取操作中，通过使用与阈值电压分布中的阈值电压分布相对应的读取代码，从存储单元读取具有多个位的数据。 在将数据写入/从存储单元读取的方法中，写入代码的一部分与读取代码的相应部分不同。
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公开(公告)号：US20090091974A1
公开(公告)日：2009-04-09
申请号：US12219663
申请日：2008-07-25
申请人： Ju-hee Park , Young-moon Kim , Yoon-dong Park , Seung-hoon Lee , Kyoung-lae Cho , Sung-jae Byun , Seung-hwan Song
发明人： Ju-hee Park , Young-moon Kim , Yoon-dong Park , Seung-hoon Lee , Kyoung-lae Cho , Sung-jae Byun , Seung-hwan Song
CPC分类号： G11C11/5628 , G11C2211/5621 , G11C2211/5648
摘要： A method of programming a non-volatile memory cell includes programming a first bit of multi-bit data by setting a threshold voltage of the non-volatile memory cell to a first voltage level within a first of a plurality of threshold voltage distributions. A second bit of the multi-bit data is programmed by setting the threshold voltage to a second voltage level based on a value of the second bit. The second voltage level is the same as the first voltage level if the second bit is a first value and the second voltage level is within a second of the plurality of threshold voltage distributions if the second bit is a second value. A third bit of the multi-bit data is programmed by setting the threshold voltage to a third voltage level based on a value of the third bit.
摘要翻译： 一种编程非易失性存储单元的方法包括通过将非易失性存储单元的阈值电压设置为多个阈值电压分布中的第一个内的第一电压电平来对第一位多位数据进行编程。 通过基于第二位的值将阈值电压设置为第二电压电平来编程多位数据的第二位。 如果第二位是第二值，则第二电压电平与第一电压电平相同，如果第二位是第二值，则第二电压电平在多个阈值电压分布的一秒内。 通过将阈值电压设置为基于第三位的值的第三电压电平来编程多位数据的第三位。
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公开(公告)号：US20080170434A1
公开(公告)日：2008-07-17
申请号：US12000493
申请日：2007-12-13
申请人： Kyoung-lae Cho , Jae-woong Hyun , Sung-jae Byun , Kyu-charn Park , Yoon-dong Park , Choong-ho Lee
发明人： Kyoung-lae Cho , Jae-woong Hyun , Sung-jae Byun , Kyu-charn Park , Yoon-dong Park , Choong-ho Lee
CPC分类号： G11C16/0483 , G11C11/5628 , G11C2211/5648
摘要： In a memory cell programming method, first through n-th programming operations are performed to program first through n-th bits of the n bits of data using the plurality of threshold voltage distributions. The first through n-th programming operations are performed sequentially. A threshold voltage difference between threshold voltage distributions used in the n-th programming operation is less than or equal to at least one threshold voltage difference between threshold voltage distributions used in the first through (n−1)-th programming operations.
摘要翻译： 在存储单元编程方法中，执行第一至第n编程操作，以使用多个阈值电压分布对n位数据的第一至第n位进行编程。 顺序执行第一至第n编程操作。 在第n编程操作中使用的阈值电压分布之间的阈值电压差小于或等于在第一至第（n-1）编程操作中使用的阈值电压分布之间的至少一个阈值电压差。
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8.发明授权Memory cell programming method and semiconductor device for simultaneously programming a plurality of memory block groups 有权用于同时编程多个存储块组的存储单元编程方法和半导体器件公开(公告)号：US07911842B2
公开(公告)日：2011-03-22
申请号：US12081568
申请日：2008-04-17
申请人： Ju-hee Park , Jae-woong Hyun , Yoon-dong Park , Kyoung-lae Cho , Sung-jae Byun , Seung-hwan Song , Jun-jin Kong , Sung-chung Park
发明人： Ju-hee Park , Jae-woong Hyun , Yoon-dong Park , Kyoung-lae Cho , Sung-jae Byun , Seung-hwan Song , Jun-jin Kong , Sung-chung Park
IPC分类号： G11C16/04
CPC分类号： H01L29/7883 , G11C16/10
摘要： Provided are a memory cell programming method and a semiconductor device which may be capable of simultaneously writing a bit of data and then another bit of the data to a plurality of memory blocks. The memory programming method, in which M bits of data are written to a plurality of memory blocks, may include a data division operation and a data writing operation where M may be a natural number. In the data division operation, the plurality of memory blocks may be divided into a plurality of memory block groups. In the data writing operation, an ith bit of the data may be simultaneously written to two or more memory block groups from among the plurality memory block groups, and then an i+1th bit of the data may be simultaneously written to the two or more memory block groups from among the plurality memory block groups, where i is a natural number less than M.
摘要翻译： 提供了一种存储器单元编程方法和半导体器件，其可以能够同时将数据位和数据的另一位写入多个存储块。 其中将M位数据写入多个存储块的存储器编程方法可以包括数据分割操作和数据写入操作，其中M可以是自然数。 在数据划分操作中，多个存储块可以被划分为多个存储块组。 在数据写入操作中，数据的第i位可以从多个存储器块组中同时写入两个或更多个存储块组，然后数据的第i + 1位可以被同时写入两个或更多个 多个存储块组中的存储块组，其中i是小于M的自然数。
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9.发明授权Method of programming multi-level semiconductor memory device and multi-level semiconductor memory device 有权编程多电平半导体存储器件和多电平半导体存储器件的方法公开(公告)号：US07577042B2
公开(公告)日：2009-08-18
申请号：US11978578
申请日：2007-10-30
申请人： Jae-woong Hyun , Kyoung-lae Cho , Kyu-charn Park , Yoon-dong Park , Choong-ho Lee , Sung-jae Byun
发明人： Jae-woong Hyun , Kyoung-lae Cho , Kyu-charn Park , Yoon-dong Park , Choong-ho Lee , Sung-jae Byun
IPC分类号： G11C7/00
CPC分类号： G11C11/5628 , G11C16/10 , G11C2211/5642
摘要： Provided in one example embodiment, a method of programming n bits of data to a semiconductor memory device may include outputting a first bit of data written in a memory cell from a first latch, storing the first bit of the data to a third latch, storing a second bit of the data to the first latch, outputting the second bit of the data from the first latch, storing the second bit of the data to the second latch, and writing the second bit of the data stored in the second latch to the memory cell with reference to a data storage state of the first bit of the data stored in the third latch.
摘要翻译： 在一个示例性实施例中提供了一种将半位数据数据编程到半导体存储器件的方法可以包括从第一锁存器输出写入存储器单元中的第一位数据，将第一位数据存储到第三锁存器，存储 将数据的第二位输出到第一锁存器，从第一锁存器输出数据的第二位，将数据的第二位存储到第二锁存器，以及将存储在第二锁存器中的数据的第二位写入到 参考存储在第三锁存器中的数据的第一位的数据存储状态的存储器单元。
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10.发明申请Memory cell programming method and semiconductor device for simultaneously programming a plurality of memory block groups 有权用于同时编程多个存储块组的存储单元编程方法和半导体器件公开(公告)号：US20080285343A1
公开(公告)日：2008-11-20
申请号：US12081568
申请日：2008-04-17
申请人： Ju-hee Park , Jae-woong Hyun , Yoon-dong Park , Kyoung-lae Cho , Sung-jae Byun , Seung-hwan Song , Jun-jin Kong , Sung-chung Park
发明人： Ju-hee Park , Jae-woong Hyun , Yoon-dong Park , Kyoung-lae Cho , Sung-jae Byun , Seung-hwan Song , Jun-jin Kong , Sung-chung Park
CPC分类号： H01L29/7883 , G11C16/10
摘要： Provided are a memory cell programming method and a semiconductor device which may be capable of simultaneously writing a bit of data and then another bit of the data to a plurality of memory blocks. The memory programming method, in which M bits of data are written to a plurality of memory blocks, may include a data division operation and a data writing operation where M may be a natural number. In the data division operation, the plurality of memory blocks may be divided into a plurality of memory block groups. In the data writing operation, an ith bit of the data may be simultaneously written to two or more memory block groups from among the plurality memory block groups, and then an i+1th bit of the data may be simultaneously written to the two or more memory block groups from among the plurality memory block groups, where i is a natural number less than M.
摘要翻译： 提供了一种存储器单元编程方法和半导体器件，其可以能够同时将数据位和数据的另一位写入多个存储块。 其中将M位数据写入多个存储块的存储器编程方法可以包括数据分割操作和数据写入操作，其中M可以是自然数。 在数据划分操作中，多个存储块可以被划分为多个存储块组。 在数据写入操作中，数据的第i / O位可以被同时写入到多个存储块组之中的两个或更多个存储块组，然后i + 1＆lt; / SUP>位可以从多个存储块组中的两个或更多个存储块组同时写入，其中i是小于M的自然数。
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