公开(公告)号：US07885107B2

公开(公告)日：2011-02-08

申请号：US12219663

申请日：2008-07-25

申请人： Ju-hee Park ,  Young-moon Kim ,  Yoon-dong Park ,  Seung-hoon Lee ,  Kyoung-lae Cho ,  Sung-jae Byun ,  Seung-hwan Song

发明人： Ju-hee Park ,  Young-moon Kim ,  Yoon-dong Park ,  Seung-hoon Lee ,  Kyoung-lae Cho ,  Sung-jae Byun ,  Seung-hwan Song

IPC分类号： G11C11/34 ,  G11C16/04

CPC分类号： G11C11/5628 ,  G11C2211/5621 ,  G11C2211/5648

摘要： A method of programming a non-volatile memory cell includes programming a first bit of multi-bit data by setting a threshold voltage of the non-volatile memory cell to a first voltage level within a first of a plurality of threshold voltage distributions. A second bit of the multi-bit data is programmed by setting the threshold voltage to a second voltage level based on a value of the second bit. The second voltage level is the same as the first voltage level if the second bit is a first value and the second voltage level is within a second of the plurality of threshold voltage distributions if the second bit is a second value. A third bit of the multi-bit data is programmed by setting the threshold voltage to a third voltage level based on a value of the third bit.

摘要翻译： 一种编程非易失性存储单元的方法包括通过将非易失性存储单元的阈值电压设置为多个阈值电压分布中的第一个内的第一电压电平来对第一位多位数据进行编程。 通过基于第二位的值将阈值电压设置为第二电压电平来编程多位数据的第二位。 如果第二位是第二值，则第二电压电平与第一电压电平相同，如果第二位是第二值，则第二电压电平在多个阈值电压分布的一秒内。 通过将阈值电压设置为基于第三位的值的第三电压电平来编程多位数据的第三位。

公开(公告)号：US20090091974A1

公开(公告)日：2009-04-09

申请号：US12219663

申请日：2008-07-25

申请人： Ju-hee Park ,  Young-moon Kim ,  Yoon-dong Park ,  Seung-hoon Lee ,  Kyoung-lae Cho ,  Sung-jae Byun ,  Seung-hwan Song

发明人： Ju-hee Park ,  Young-moon Kim ,  Yoon-dong Park ,  Seung-hoon Lee ,  Kyoung-lae Cho ,  Sung-jae Byun ,  Seung-hwan Song

IPC分类号： G11C16/04 ,  G11C16/06 ,  G11C7/00

CPC分类号： G11C11/5628 ,  G11C2211/5621 ,  G11C2211/5648

摘要： A method of programming a non-volatile memory cell includes programming a first bit of multi-bit data by setting a threshold voltage of the non-volatile memory cell to a first voltage level within a first of a plurality of threshold voltage distributions. A second bit of the multi-bit data is programmed by setting the threshold voltage to a second voltage level based on a value of the second bit. The second voltage level is the same as the first voltage level if the second bit is a first value and the second voltage level is within a second of the plurality of threshold voltage distributions if the second bit is a second value. A third bit of the multi-bit data is programmed by setting the threshold voltage to a third voltage level based on a value of the third bit.

摘要翻译： 一种编程非易失性存储单元的方法包括通过将非易失性存储单元的阈值电压设置为多个阈值电压分布中的第一个内的第一电压电平来对第一位多位数据进行编程。 通过基于第二位的值将阈值电压设置为第二电压电平来编程多位数据的第二位。 如果第二位是第二值，则第二电压电平与第一电压电平相同，如果第二位是第二值，则第二电压电平在多个阈值电压分布的一秒内。 通过将阈值电压设置为基于第三位的值的第三电压电平来编程多位数据的第三位。

公开(公告)号：US20080285352A1

公开(公告)日：2008-11-20

申请号：US12010481

申请日：2008-01-25

申请人： Kyoung-lae Cho ,  Yoon-dong Park ,  Jun-jin Kong ,  Seung-hoon Lee ,  Jae-woong Hyun ,  Sung-jae Byun ,  Ju-hee Park ,  Seung-hwan Song

发明人： Kyoung-lae Cho ,  Yoon-dong Park ,  Jun-jin Kong ,  Seung-hoon Lee ,  Jae-woong Hyun ,  Sung-jae Byun ,  Ju-hee Park ,  Seung-hwan Song

IPC分类号： G11C16/06

CPC分类号： G11C16/10 ,  G11C7/1006 ,  G11C11/5628 ,  G11C11/5642 ,  G11C2211/5642

摘要： Provided are a method of writing/reading data into/from a memory cell and a page buffer using different codes for the writing and reading operations. The method of writing/reading data into/from a memory cell that has a plurality of threshold voltage distributions includes a data writing operation and a data reading operation. In the data writing operation, data having a plurality of bits is written into the memory cell by using a plurality of writing codes corresponding to threshold voltage distributions. In the data reading operation, the data having a plurality of bits is read from the memory cell by using reading codes corresponding to the threshold voltage distributions from among the threshold voltage distributions. In the method of writing/reading data into/from a memory cell, a part of the writing codes is different from a corresponding part of the reading codes.

摘要翻译： 提供了一种将数据写入/从存储单元读取数据的方法和使用不同代码进行写入和读取操作的页面缓冲器。 对具有多个阈值电压分布的存储单元写入/读取数据的方法包括数据写入操作和数据读取操作。 在数据写入操作中，通过使用与阈值电压分布对应的多个写入代码，将具有多个位的数据写入存储单元。 在数据读取操作中，通过使用与阈值电压分布中的阈值电压分布相对应的读取代码，从存储单元读取具有多个位的数据。 在将数据写入/从存储单元读取的方法中，写入代码的一部分与读取代码的相应部分不同。

公开(公告)号：US07729175B2

公开(公告)日：2010-06-01

申请号：US12010481

申请日：2008-01-25

申请人： Kyoung-lae Cho ,  Yoon-dong Park ,  Jun-jin Kong ,  Seung-hoon Lee ,  Jae-woong Hyun ,  Sung-jae Byun ,  Ju-hee Park ,  Seung-hwan Song

发明人： Kyoung-lae Cho ,  Yoon-dong Park ,  Jun-jin Kong ,  Seung-hoon Lee ,  Jae-woong Hyun ,  Sung-jae Byun ,  Ju-hee Park ,  Seung-hwan Song

IPC分类号： G11C11/34

CPC分类号： G11C16/10 ,  G11C7/1006 ,  G11C11/5628 ,  G11C11/5642 ,  G11C2211/5642

摘要： Provided are a method of writing/reading data into/from a memory cell and a page buffer using different codes for the writing and reading operations. The method of writing/reading data into/from a memory cell that has a plurality of threshold voltage distributions includes a data writing operation and a data reading operation. In the data writing operation, data having a plurality of bits is written into the memory cell by using a plurality of writing codes corresponding to threshold voltage distributions. In the data reading operation, the data having a plurality of bits is read from the memory cell by using reading codes corresponding to the threshold voltage distributions from among the threshold voltage distributions. In the method of writing/reading data into/from a memory cell, a part of the writing codes is different from a corresponding part of the reading codes.

摘要翻译： 提供了一种将数据写入/从存储单元读取数据的方法和使用不同代码进行写入和读取操作的页面缓冲器。 对具有多个阈值电压分布的存储单元写入/读取数据的方法包括数据写入操作和数据读取操作。 在数据写入操作中，通过使用与阈值电压分布对应的多个写入代码，将具有多个位的数据写入存储单元。 在数据读取操作中，通过使用与阈值电压分布中的阈值电压分布相对应的读取代码，从存储单元读取具有多个位的数据。 在将数据写入/从存储单元读取的方法中，写入代码的一部分与读取代码的相应部分不同。

公开(公告)号：US20080285343A1

公开(公告)日：2008-11-20

申请号：US12081568

申请日：2008-04-17

申请人： Ju-hee Park ,  Jae-woong Hyun ,  Yoon-dong Park ,  Kyoung-lae Cho ,  Sung-jae Byun ,  Seung-hwan Song ,  Jun-jin Kong ,  Sung-chung Park

发明人： Ju-hee Park ,  Jae-woong Hyun ,  Yoon-dong Park ,  Kyoung-lae Cho ,  Sung-jae Byun ,  Seung-hwan Song ,  Jun-jin Kong ,  Sung-chung Park

IPC分类号： G11C16/04 ,  G11C8/00

CPC分类号： H01L29/7883 ,  G11C16/10

摘要： Provided are a memory cell programming method and a semiconductor device which may be capable of simultaneously writing a bit of data and then another bit of the data to a plurality of memory blocks. The memory programming method, in which M bits of data are written to a plurality of memory blocks, may include a data division operation and a data writing operation where M may be a natural number. In the data division operation, the plurality of memory blocks may be divided into a plurality of memory block groups. In the data writing operation, an ith bit of the data may be simultaneously written to two or more memory block groups from among the plurality memory block groups, and then an i+1th bit of the data may be simultaneously written to the two or more memory block groups from among the plurality memory block groups, where i is a natural number less than M.

摘要翻译： 提供了一种存储器单元编程方法和半导体器件，其可以能够同时将数据位和数据的另一位写入多个存储块。 其中将M位数据写入多个存储块的存储器编程方法可以包括数据分割操作和数据写入操作，其中M可以是自然数。 在数据划分操作中，多个存储块可以被划分为多个存储块组。 在数据写入操作中，数据的第i / O位可以被同时写入到多个存储块组之中的两个或更多个存储块组，然后i + 1＆lt; / SUP>位可以从多个存储块组中的两个或更多个存储块组同时写入，其中i是小于M的自然数。

公开(公告)号：US07911842B2

公开(公告)日：2011-03-22

申请号：US12081568

申请日：2008-04-17

申请人： Ju-hee Park ,  Jae-woong Hyun ,  Yoon-dong Park ,  Kyoung-lae Cho ,  Sung-jae Byun ,  Seung-hwan Song ,  Jun-jin Kong ,  Sung-chung Park

发明人： Ju-hee Park ,  Jae-woong Hyun ,  Yoon-dong Park ,  Kyoung-lae Cho ,  Sung-jae Byun ,  Seung-hwan Song ,  Jun-jin Kong ,  Sung-chung Park

IPC分类号： G11C16/04

CPC分类号： H01L29/7883 ,  G11C16/10

摘要： Provided are a memory cell programming method and a semiconductor device which may be capable of simultaneously writing a bit of data and then another bit of the data to a plurality of memory blocks. The memory programming method, in which M bits of data are written to a plurality of memory blocks, may include a data division operation and a data writing operation where M may be a natural number. In the data division operation, the plurality of memory blocks may be divided into a plurality of memory block groups. In the data writing operation, an ith bit of the data may be simultaneously written to two or more memory block groups from among the plurality memory block groups, and then an i+1th bit of the data may be simultaneously written to the two or more memory block groups from among the plurality memory block groups, where i is a natural number less than M.

摘要翻译： 提供了一种存储器单元编程方法和半导体器件，其可以能够同时将数据位和数据的另一位写入多个存储块。 其中将M位数据写入多个存储块的存储器编程方法可以包括数据分割操作和数据写入操作，其中M可以是自然数。 在数据划分操作中，多个存储块可以被划分为多个存储块组。 在数据写入操作中，数据的第i位可以从多个存储器块组中同时写入两个或更多个存储块组，然后数据的第i + 1位可以被同时写入两个或更多个 多个存储块组中的存储块组，其中i是小于M的自然数。

公开(公告)号：US20080316824A1

公开(公告)日：2008-12-25

申请号：US12071349

申请日：2008-02-20

申请人： Ju-hee Park ,  Jae-wong Hyun ,  Kyoung-lae Cho ,  Yoon-dong Park ,  Seung-hoon Lee ,  Kee-won Kwon

发明人： Ju-hee Park ,  Jae-wong Hyun ,  Kyoung-lae Cho ,  Yoon-dong Park ,  Seung-hoon Lee ,  Kee-won Kwon

IPC分类号： G11C16/06 ,  G11C16/04

CPC分类号： G11C11/5642 ,  G11C2211/5641 ,  G11C2211/5646

摘要： Provided are a semiconductor device having a block state confirmation cell that may store information indicating the number of data bits written to a plurality of memory cells, a method of reading memory data based on the number of the data bits written, and/or a memory programming method of storing the information indicating the number of the data bits written. The semiconductor device may include one or more memory blocks and a controller. Each of the memory blocks may include a plurality of memory cells each storing data, and a block state confirmation cell storing information indicating the number of data bits written to the memory cells. The controller may read the data bits from the memory blocks based on the number of data bits, which is indicated in the information in the block state confirmation cell.

摘要翻译： 提供了具有块状态确认单元的半导体器件，其可以存储指示写入多个存储器单元的数据位数的信息，基于写入的数据位的数量读取存储器数据的方法和/或存储器 存储指示写入数据位数的信息的编程方法。 半导体器件可以包括一个或多个存储器块和控制器。 每个存储器块可以包括存储数据的多个存储单元，以及存储指示写入存储单元的数据位数的信息的块状态确认单元。 控制器可以基于在块状态确认单元中的信息中指示的数据位数来从存储器块读取数据位。

公开(公告)号：US08050087B2

公开(公告)日：2011-11-01

申请号：US12071349

申请日：2008-02-20

申请人： Ju-hee Park ,  Jae-woong Hyun ,  Kyoung-lae Cho ,  Yoon-dong Park ,  Seung-hoon Lee ,  Kee-won Kwon

发明人： Ju-hee Park ,  Jae-woong Hyun ,  Kyoung-lae Cho ,  Yoon-dong Park ,  Seung-hoon Lee ,  Kee-won Kwon

IPC分类号： G11C11/34 ,  G11C16/04

CPC分类号： G11C11/5642 ,  G11C2211/5641 ,  G11C2211/5646

摘要： Provided are a semiconductor device having a block state confirmation cell that may store information indicating the number of data bits written to a plurality of memory cells, a method of reading memory data based on the number of the data bits written, and/or a memory programming method of storing the information indicating the number of the data bits written. The semiconductor device may include one or more memory blocks and a controller. Each of the memory blocks may include a plurality of memory cells each storing data, and a block state confirmation cell storing information indicating the number of data bits written to the memory cells. The controller may read the data bits from the memory blocks based on the number of data bits, which is indicated in the information in the block state confirmation cell.

摘要翻译： 提供了具有块状态确认单元的半导体器件，其可以存储指示写入多个存储器单元的数据位数的信息，基于写入的数据位的数量读取存储器数据的方法和/或存储器 存储指示写入数据位数的信息的编程方法。 半导体器件可以包括一个或多个存储器块和控制器。 每个存储器块可以包括存储数据的多个存储单元，以及存储指示写入存储单元的数据位数的信息的块状态确认单元。 控制器可以基于在块状态确认单元中的信息中指示的数据位数来从存储器块读取数据位。

公开(公告)号：US20120026790A1

公开(公告)日：2012-02-02

申请号：US13137668

申请日：2011-09-01

申请人： Ju-hee Park ,  Jae-woong Hyun ,  Kyoung-lae Cho ,  Yoon-dong Park ,  Seung-hoon Lee ,  Kee-won Kwon

发明人： Ju-hee Park ,  Jae-woong Hyun ,  Kyoung-lae Cho ,  Yoon-dong Park ,  Seung-hoon Lee ,  Kee-won Kwon

IPC分类号： G11C16/10 ,  G11C16/06 ,  G11C16/04

CPC分类号： G11C11/5642 ,  G11C2211/5641 ,  G11C2211/5646

摘要： Provided are a semiconductor device having a block state confirmation cell that may store information indicating the number of data bits written to a plurality of memory cells, a method of reading memory data based on the number of the data bits written, and/or a memory programming method of storing the information indicating the number of the data bits written. The semiconductor device may include one or more memory blocks and a controller. Each of the memory blocks may include a plurality of memory cells each storing data, and a block state confirmation cell storing information indicating the number of data bits written to the memory cells. The controller may read the data bits from the memory blocks based on the number of data bits, which is indicated in the information in the block state confirmation cell.

摘要翻译： 提供了具有块状态确认单元的半导体器件，其可以存储指示写入多个存储器单元的数据位数的信息，基于写入的数据位的数量读取存储器数据的方法和/或存储器 存储指示写入数据位数的信息的编程方法。 半导体器件可以包括一个或多个存储器块和控制器。 每个存储器块可以包括存储数据的多个存储单元，以及存储指示写入存储单元的数据位数的信息的块状态确认单元。 控制器可以基于在块状态确认单元中的信息中指示的数据位数来从存储器块读取数据位。

公开(公告)号：US07675786B2

公开(公告)日：2010-03-09

申请号：US11898709

申请日：2007-09-14

申请人： Sang-jin Park ,  In-jun Hwang ,  Jae-woong Hyun ,  Yoon-dong Park ,  Kwang-soo Seol ,  Sang-min Shin ,  Sang-moo Choi ,  Ju-hee Park

发明人： Sang-jin Park ,  In-jun Hwang ,  Jae-woong Hyun ,  Yoon-dong Park ,  Kwang-soo Seol ,  Sang-min Shin ,  Sang-moo Choi ,  Ju-hee Park

IPC分类号： G11C16/04

CPC分类号： H01L29/66825 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/42332 ,  H01L29/4234 ,  H01L29/7881 ,  H01L29/792 ,  H01L29/7926

摘要： A semiconductor memory device may include a semiconductor substrate, a control gate electrode recessed in the semiconductor substrate, a storage node layer between the control gate electrode and the semiconductor substrate, a tunneling insulating layer between the storage node layer and the semiconductor substrate, a blocking insulating layer between the storage node layer and the control gate electrode, and first and second channel regions surrounding the control gate electrode and separated by a pair of opposing separating insulating layers. A method of operating the semiconductor memory device may include programming data in the storage node layer by charge tunneling through the blocking insulating layer, thus achieving relatively high reliability and efficiency.

摘要翻译： 半导体存储器件可以包括半导体衬底，凹入半导体衬底中的控制栅电极，控制栅电极和半导体衬底之间的存储节点层，存储节点层和半导体衬底之间的隧穿绝缘层， 存储节点层和控制栅电极之间的绝缘层以及围绕控制栅电极并由一对相对的分隔绝缘层隔开的第一和第二沟道区。 操作半导体存储器件的方法可以包括通过阻塞绝缘层进行电荷隧穿而在存储节点层中编程数据，从而实现相对较高的可靠性和效率。