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公开(公告)号：US07568115B2
公开(公告)日：2009-07-28
申请号：US11238489
申请日：2005-09-28
申请人： Shekhar Borkar , Tanay Karnik , Shu-ling Garver
发明人： Shekhar Borkar , Tanay Karnik , Shu-ling Garver
IPC分类号： G06F1/26
CPC分类号： G06F1/3203 , G06F1/3287 , G06F1/3296 , H01L25/0657 , H01L25/16 , H01L25/18 , H01L2225/06513 , H01L2225/06527 , H01L2924/0002 , Y02D10/171 , Y02D10/172 , H01L2924/00
摘要： According to embodiments of the disclosed subject matter in this application, a power management system with multiple voltage regulator (“VRs”) may be used to supply power to cores in a many-core processor. Each VR may supply power to a core or a part of a core. Different VRs may provide multiple voltages to a core/part in the many-core processor. The value of the output voltage of a VR may be modulated under the direction of the core/part to which the voltage regulator supplies power. In one embodiment, the multiple VRs may be integrated with cores in a single die. In another embodiment, the power management system with multiple VRs may be on a die (“the VR die”) separate from the die of the many-core processor. The VR die may be included in the same package as the many-core processor die.
摘要翻译： 根据本申请中公开的主题的实施例，具有多个电压调节器（“VR”）的电力管理系统可以用于向多核处理器中的核供电。 每个VR可以为核心或核心的一部分供电。 不同的VR可以为多核处理器中的核/部件提供多个电压。 VR的输出电压的值可以在电压调节器供电的核心/部件的方向上进行调制。 在一个实施例中，多个VR可以与单个管芯中的核心集成。 在另一实施例中，具有多个VR的电源管理系统可以在与多核处理器的管芯分离的管芯（“VR管芯”）上。 VR芯片可以包含在与多核处理器芯片相同的封装中。
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公开(公告)号：US20070070673A1
公开(公告)日：2007-03-29
申请号：US11238489
申请日：2005-09-28
申请人： Shekhar Borkar , Tanay Karnik , Shu-ling Garver
发明人： Shekhar Borkar , Tanay Karnik , Shu-ling Garver
IPC分类号： G11C5/06
CPC分类号： G06F1/3203 , G06F1/3287 , G06F1/3296 , H01L25/0657 , H01L25/16 , H01L25/18 , H01L2225/06513 , H01L2225/06527 , H01L2924/0002 , Y02D10/171 , Y02D10/172 , H01L2924/00
摘要： According to embodiments of the disclosed subject matter in this application, a power management system with multiple voltage regulator (“VRs”) may be used to supply power to cores in a many-core processor. Each VR may supply power to a core or a part of a core. Different VRs may provide multiple voltages to a core/part in the many-core processor. The value of the output voltage of a VR may be modulated under the direction of the core/part to which the voltage regulator supplies power. In one embodiment, the multiple VRs may be integrated with cores in a single die. In another embodiment, the power management system with multiple VRs may be on a die (“the VR die”) separate from the die of the many-core processor. The VR die may be included in the same package as the many-core processor die.
摘要翻译： 根据本申请中公开的主题的实施例，具有多个电压调节器（“VR”）的电力管理系统可以用于向多核处理器中的核供电。 每个VR可以为核心或核心的一部分供电。 不同的VR可以为多核处理器中的核/部件提供多个电压。 VR的输出电压的值可以在电压调节器供电的核心/部件的方向上进行调制。 在一个实施例中，多个VR可以与单个管芯中的核心集成。 在另一个实施例中，具有多个VR的电源管理系统可以在与多核处理器的管芯分开的管芯（“VR管芯”）上。 VR芯片可以包含在与多核处理器芯片相同的封装中。
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3.发明授权Power delivery system in which VRM and CPU exchange power consumption measurements 有权供电系统，其中VRM和CPU交换功耗测量公开(公告)号：US08694816B2
公开(公告)日：2014-04-08
申请号：US12356313
申请日：2009-01-20
申请人： Shekhar Borkar , Tanay Karnik , Peter Hazucha , Gerhard Schrom , Greg Dermer
发明人： Shekhar Borkar , Tanay Karnik , Peter Hazucha , Gerhard Schrom , Greg Dermer
IPC分类号： G06F1/26
CPC分类号： G06F1/28
摘要： A system is disclosed. The system includes a load, a voltage regulator circuit coupled to the load a power supply, a load coupled to the power supply to receive one or more voltages from the power supply, and a digital bus, coupled between the power supply and the load. The digital bus transmits power consumption measurements from the load to the power supply and transmits power consumption measurements from the power supply to the load.
摘要翻译： 公开了一种系统。 该系统包括负载，电压调节器电路，耦合到负载电源，耦合到电源以从电源接收一个或多个电压的负载以及耦合在电源和负载之间的数字总线。 数字总线将功耗测量从负载传输到电源，并将功耗测量从电源传输到负载。
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公开(公告)号：US20060071650A1
公开(公告)日：2006-04-06
申请号：US10954464
申请日：2004-09-30
申请人： Siva Narendra , Howard Wilson , Donald Gardner , Peter Hazucha , Gerhard Schrom , Tanay Karnik , Nitin Borkar , Vivek De , Shekhar Borkar
发明人： Siva Narendra , Howard Wilson , Donald Gardner , Peter Hazucha , Gerhard Schrom , Tanay Karnik , Nitin Borkar , Vivek De , Shekhar Borkar
IPC分类号： G05F1/40
CPC分类号： G06F1/26 , G06F1/189 , H01L25/16 , H01L25/18 , H01L2224/16145 , H01L2924/00014 , H01L2924/01068 , H01L2924/15311 , H01L2924/3011 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A central processing unit (CPU) is disclosed. The CPU includes a CPU die; and a voltage regulator/converter die bonded to the CPU die in a three dimensional packaging layout.
摘要翻译： 公开了一种中央处理单元（CPU）。 CPU包括CPU管芯; 以及以三维封装布局结合到CPU管芯的电压调节器/转换器管芯。
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公开(公告)号：US20060071648A1
公开(公告)日：2006-04-06
申请号：US10955383
申请日：2004-09-30
申请人： Siva Narendra , James Tschanz , Howard Wilson , Donald Gardner , Peter Hazucha , Gerhard Schrom , Tanay Karnik , Nitin Borkar , Vivek De , Shekhar Borkar
发明人： Siva Narendra , James Tschanz , Howard Wilson , Donald Gardner , Peter Hazucha , Gerhard Schrom , Tanay Karnik , Nitin Borkar , Vivek De , Shekhar Borkar
IPC分类号： G05F1/00
CPC分类号： H01L25/0657 , H01L25/18 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/16145 , H01L2224/16227 , H01L2225/06513 , H01L2225/06527 , H01L2924/00014 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A central processing unit (CPU) is disclosed. The CPU includes a CPU die; and a power management die bonded to the CPU die in a three dimensional packaging layout.
摘要翻译： 公开了一种中央处理单元（CPU）。 CPU包括CPU管芯; 以及以三维封装布局结合到CPU裸片的电源管理裸片。
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公开(公告)号：US20060041763A1
公开(公告)日：2006-02-23
申请号：US10922050
申请日：2004-08-19
申请人： Shekhar Borkar , Tanay Karnik , Peter Hazucha , Gerhard Schrom , Greg Dermer
发明人： Shekhar Borkar , Tanay Karnik , Peter Hazucha , Gerhard Schrom , Greg Dermer
IPC分类号： G06F1/26
CPC分类号： G06F1/28
摘要： A system is disclosed. The system includes a load, a voltage regulator circuit coupled to the load a power supply, a load coupled to the power supply to receive one or more voltages from the power supply, and a digital bus, coupled between the power supply and the load. The digital bus transmits power consumption measurements from the load to the power supply and transmits power consumption measurements from the power supply to the load.
摘要翻译： 公开了一种系统。 该系统包括负载，电压调节器电路，耦合到负载电源，耦合到电源以从电源接收一个或多个电压的负载以及耦合在电源和负载之间的数字总线。 数字总线将功耗测量从负载传输到电源，并将功耗测量从电源传输到负载。
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公开(公告)号：US20090199033A1
公开(公告)日：2009-08-06
申请号：US12356313
申请日：2009-01-20
申请人： Shekhar Borkar , Tanay Karnik , Peter Hazucha , Gerhard Schrom , Greg Dermer
发明人： Shekhar Borkar , Tanay Karnik , Peter Hazucha , Gerhard Schrom , Greg Dermer
IPC分类号： G06F1/26
CPC分类号： G06F1/28
摘要： A system is disclosed. The system includes a load, a voltage regulator circuit coupled to the load a power supply, a load coupled to the power supply to receive one or more voltages from the power supply, and a digital bus, coupled between the power supply and the load. The digital bus transmits power consumption measurements from the load to the power supply and transmits power consumption measurements from the power supply to the load.
摘要翻译： 公开了一种系统。 该系统包括负载，电压调节器电路，耦合到负载电源，耦合到电源以从电源接收一个或多个电压的负载以及耦合在电源和负载之间的数字总线。 数字总线将功耗测量从负载传输到电源，并将功耗测量从电源传输到负载。
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公开(公告)号：US20070260848A1
公开(公告)日：2007-11-08
申请号：US11825252
申请日：2007-07-03
申请人： Siva Narendra , James Tschanz , Howard Wilson , Donald Gardner , Peter Hazucha , Gerhard Schrom , Tanay Karnik , Nitin Borkar , Vivek De , Shekhar Borkar
发明人： Siva Narendra , James Tschanz , Howard Wilson , Donald Gardner , Peter Hazucha , Gerhard Schrom , Tanay Karnik , Nitin Borkar , Vivek De , Shekhar Borkar
CPC分类号： H01L25/0657 , H01L25/18 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/16145 , H01L2224/16227 , H01L2225/06513 , H01L2225/06527 , H01L2924/00014 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： An integrated circuit (IC) package is disclosed. The IC package includes a first die; and a second die bonded to the CPU die in a three dimensional packaging layout.
摘要翻译： 公开了一种集成电路（IC）封装。 IC封装包括第一裸片; 以及以三维封装布局结合到CPU管芯的第二管芯。
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公开(公告)号：US20060099734A1
公开(公告)日：2006-05-11
申请号：US10955746
申请日：2004-09-30
申请人： Siva Narendra , Howard Wilson , Donald Gardner , Peter Hazucha , Gerhard Schrom , Tanay Karnik , Nitin Borkar , Vivek De , Shekhar Borkar
发明人： Siva Narendra , Howard Wilson , Donald Gardner , Peter Hazucha , Gerhard Schrom , Tanay Karnik , Nitin Borkar , Vivek De , Shekhar Borkar
IPC分类号： H01L21/50
CPC分类号： H01L25/18 , G06F1/189 , G06F1/26 , H01L25/0657 , H01L2224/16 , H01L2225/06513 , H01L2225/06527 , H01L2924/00011 , H01L2924/00014 , H01L2924/3011 , H01L2224/0401
摘要： A central processing unit (CPU) is disclosed. The CPU includes a CPU die; and a voltage regulator die bonded to the CPU die in a three dimensional packaging layout.
摘要翻译： 公开了一种中央处理单元（CPU）。 CPU包括CPU管芯; 以及以三维封装布局结合到CPU裸片的电压调节器芯片。
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10.发明授权Power delivery system in which power supply and load exchange power consumption measurements via digital bus 有权电力输送系统，其中通过数字总线进行电源和负载交换功耗测量公开(公告)号：US07523337B2
公开(公告)日：2009-04-21
申请号：US10922050
申请日：2004-08-19
申请人： Shekhar Borkar , Tanay Karnik , Peter Hazucha , Gerhard Schrom , Greg Dermer
发明人： Shekhar Borkar , Tanay Karnik , Peter Hazucha , Gerhard Schrom , Greg Dermer
IPC分类号： G06F1/26
CPC分类号： G06F1/28
摘要： A system is disclosed. The system includes a load, a voltage regulator circuit coupled to the load a power supply, a load coupled to the power supply to receive one or more voltages from the power supply, and a digital bus, coupled between the power supply and the load. The digital bus transmits power consumption measurements from the load to the power supply and transmits power consumption measurements from the power supply to the load.
摘要翻译： 公开了一种系统。 该系统包括负载，电压调节器电路，耦合到负载电源，耦合到电源以从电源接收一个或多个电压的负载以及耦合在电源和负载之间的数字总线。 数字总线将功耗测量从负载传输到电源，并将功耗测量从电源传输到负载。
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