公开(公告)号：US5128732A

公开(公告)日：1992-07-07

申请号：US199439

申请日：1988-05-27

申请人： Kazuyuki Sugahara ,  Tadashi Nishimura ,  Shigeru Kusunoki ,  Yasuo Inoue ,  Yasuo Yamaguchi

发明人： Kazuyuki Sugahara ,  Tadashi Nishimura ,  Shigeru Kusunoki ,  Yasuo Inoue ,  Yasuo Yamaguchi

IPC分类号： H01L27/06

CPC分类号： H01L27/0688

摘要： A stacked semiconductor device has three-dimensional alternate layers of iconductor elements and insulating layers each electrically insulating the adjacent upper and lower layers of semiconductor elements, formed on a single crystal semiconductor substrate. A semiconductor is deposited in openings formed respectively in the insulating layers to form single crystal semiconductor layers each having the same crystal axis as the single crystal semiconductor substrate respectively over the insulating layers, and semiconductor elements are formed respectively in a plurality of layers. The opening formed through the upper insulating layer reaches the lower layer of the semiconductor element immediately below the same upper insulating layer, and is formed at a position spaced apart horizontally from the opening formed through the lower insulating layer immediately below the same upper insulating layer. A semiconductor for forming the upper layer of a semiconductor having the same crystal axis as the lower layer of a semiconductor is deposited in the opening of the upper insulating layer so that satisfactory lateral epitaxial growth will occur over the insulating layer.

摘要翻译： 叠层半导体器件具有三维交替层的半导体元件和绝缘层，每个绝缘层将形成在单晶半导体衬底上的相邻的半导体元件的上层和下层电绝缘。 分别在绝缘层中形成的开口中沉积半导体，以形成分别在绝缘层上分别与单晶半导体衬底相同的晶轴的单晶半导体层，并分别形成多个半导体元件。 通过上绝缘层形成的开口到达同一上绝缘层正下方的半导体元件的下层，并形成在与通过同一上绝缘层正下方的下绝缘层形成的开口水平间隔开的位置处。 用于形成具有与半导体的下层相同的晶轴的半导体的上层的半导体被沉积在上绝缘层的开口中，使得在绝缘层上将发生令人满意的横向外延生长。

公开(公告)号：US4870031A

公开(公告)日：1989-09-26

申请号：US102655

申请日：1987-09-30

申请人： Kazuyuki Sugahara ,  Tadashi Nishimura ,  Shigeru Kusunoki ,  Yasuo Inoue

发明人： Kazuyuki Sugahara ,  Tadashi Nishimura ,  Shigeru Kusunoki ,  Yasuo Inoue

IPC分类号： H01L21/20 ,  H01L21/263 ,  H01L21/822 ,  H01L21/84 ,  H01L27/00

CPC分类号： H01L21/8221 ,  H01L21/2026 ,  Y10S117/904 ,  Y10S117/905 ,  Y10S148/09

摘要： In a method of manufacturing a semiconductor device comprising melting an amorphous or polycrystalline first semiconductor layer formed on the surface of a first dielectric layer by irradiating energy rays thereon, and converting the same into single crystals by the subsequent lowering of the temperature and forming a second dielectric layer and a second semiconductor layer on the first semiconductor layer. Energy rays are irradiated under the condition capable of melting the first semiconductor layer through the second semiconductor layer and the second dielectric layer and, after the completion of the conversion into single crystals, the second semiconductor layer and the second dielectric layer are eliminated through etching.

摘要翻译： 在制造半导体器件的方法中，包括通过照射第一介电层的表面上的能量射线来熔化形成在第一介电层的表面上的非晶或多晶的第一半导体层，并且随后降低温度并将其转变为单晶 电介质层和第一半导体层上的第二半导体层。 在能够通过第二半导体层和第二电介质层熔化第一半导体层的条件下照射能量射线，并且在完成转换成单晶之后，通过蚀刻去除第二半导体层和第二电介质层。

公开(公告)号：US4778269A

公开(公告)日：1988-10-18

申请号：US11511

申请日：1987-02-06

申请人： Yasuo Inoue ,  Tadashi Nishimura ,  Kazuyuki Sugahara ,  Shigeru Kusunoki

发明人： Yasuo Inoue ,  Tadashi Nishimura ,  Kazuyuki Sugahara ,  Shigeru Kusunoki

IPC分类号： G01N21/21 ,  G01N21/65 ,  G01N21/84 ,  G01J3/44

CPC分类号： G01N21/65 ,  G01N2021/656 ,  G01N2021/8477 ,  G01N21/21

摘要： In a method for determining orientation of a crystal with polarization selective Raman microprobe spectroscopy, polarization angles of both light incident on the crystal and Raman scattered light emitted from the crystal are varied coincidently in ordinary circumstances and only either one of the polarization angles is varied in only case that intensity of the scattered beam does not change substantially in spite of the coincident variation of both the polarization angles.

摘要翻译： 在通过偏振选择拉曼微探针光谱法确定晶体取向的方法中，入射到晶体上的两个光的偏振角和从晶体发射的拉曼散射光在一般情况下一致地变化，并且只有任一个偏振角在 只是散射光的强度几乎不变化，尽管两个偏振角都是一致的变化。

公开(公告)号：US4714684A

公开(公告)日：1987-12-22

申请号：US844324

申请日：1986-03-26

申请人： Kazuyuki Sugahara ,  Tadashi Nishimura ,  Shigeru Kusunoki ,  Yasuo Inoue

发明人： Kazuyuki Sugahara ,  Tadashi Nishimura ,  Shigeru Kusunoki ,  Yasuo Inoue

IPC分类号： H01L21/20 ,  H01L21/263 ,  H01L21/822 ,  H01L27/00 ,  C30B13/06

CPC分类号： H01L21/2026 ,  H01L21/8221 ,  Y10S117/904 ,  Y10S148/093

摘要： In a method of manufacturing a semiconductor device of a three-dimensional structure having a semiconductor substrate and another single crystal semiconductor layer formed thereon, the another single crystal semiconductor layer is prepared by melting a vapor-deposited amorphous or polycrystalline semiconductor layer by the energy of laser beams then solidifying and converting the layer into single crystals. For initiating the melting at selected regions of the layer, the layer is formed at the surface thereof with a silicon nitride film of a uniform thickness and a silicon nitride film with a thickness at the region corresponding to the selected region different from that of the remaining region. The region thicker or thinner than other region reflects the laser energy at different reflectivity thereby to provide a desired temperature distribution.

摘要翻译： 在制造具有半导体衬底和形成在其上的另一个单晶半导体层的三维结构的半导体器件的方法中，另一个单晶半导体层是通过将蒸镀的非晶或多晶半导体层的能量 然后激光束固化并将层转化为单晶。 为了在层的选定区域开始熔化，在其表面上形成具有均匀厚度的氮化硅膜和在对应于所选区域的区域的厚度的氮化硅膜的层 地区。 比其他区域更厚或更薄的区域反映了不同反射率下的激光能量，从而提供期望的温度分布。

公开(公告)号：US4661167A

公开(公告)日：1987-04-28

申请号：US677343

申请日：1984-12-03

申请人： Shigeru Kusunoki ,  Tadashi Nishimura ,  Kazuyuki Sugahara

发明人： Shigeru Kusunoki ,  Tadashi Nishimura ,  Kazuyuki Sugahara

IPC分类号： H01L27/00 ,  H01L21/20 ,  H01L21/268 ,  H01L21/762 ,  H01L29/78 ,  H01L29/786 ,  H01L21/263

CPC分类号： H01L21/76264 ,  H01L21/2026 ,  H01L29/78654 ,  H01L21/76272 ,  H01L21/76281 ,  Y10S117/904 ,  Y10S148/164

摘要： A method for manufacturing a semiconductor device, which comprises: a first process for producing a semiconductor layer of polycrystalline silicon or amorphous silicon on the surface of a substrate of insulator or a substrate made up by forming an insulating layer on a basic semiconductor; a second process for producing an island of semiconductor layer surrounded by dielectric materials from the semiconductor layer; a third process for producing a film of Si.sub.3 N.sub.4 on the island of semiconductor layer, or on a film of SiO.sub.2 formed on the island; a fourth process for removing the film of Si.sub.3 N.sub.4 at a predetermined region on the island; and a fifth process for irradiating with scanning an energy beam to the island of semiconductor layer so as to melt and recrystallize the island, thereby monocrystallizing or increasing the size of crystal grains at at least a partial region thereof.

摘要翻译： 一种半导体器件的制造方法，其特征在于，包括：通过在基础半导体上形成绝缘层而构成的绝缘体或基板的基板的表面上制造多晶硅或非晶硅的半导体层的第一工序; 用于制造由半导体层被电介质材料包围的半导体层的岛的第二工艺; 在半导体层的岛上或在岛上形成的SiO 2膜上制造Si 3 N 4的膜的第3工序; 在岛上的预定区域除去Si 3 N 4膜的第四工序; 以及将能量束扫描到半导体层的岛上以便使岛熔融并重结晶的第五种方法，从而在其至少部分区域上单晶化或增加晶粒的尺寸。

公开(公告)号：US5094714A

公开(公告)日：1992-03-10

申请号：US607800

申请日：1990-10-31

申请人： Tadashi Nishimura ,  Kazuyuki Sugahara ,  Shigeru Kusunoki ,  Yasuo Inoue

发明人： Tadashi Nishimura ,  Kazuyuki Sugahara ,  Shigeru Kusunoki ,  Yasuo Inoue

IPC分类号： H01L21/20 ,  C30B13/00 ,  H01L21/762

CPC分类号： C30B29/06 ,  C30B13/00 ,  H01L21/76297 ,  Y10T428/31504

摘要： A wafer structure for forming a semiconductor single crystal film comprises a semiconductor single crystal substrate, a plurality of recesses formed in a grooved shape to one main surface of the semiconductor single crystal substrate, insulation material embedded to the inside of these recesses, an insulation layer deposited over the insulation material and the semiconductor single crystal substrate and integrated with the insulation material and a polycrystalline or amorphous semiconductor layer to be recrystallized disposed over the insulation layer.A wafer structure with no or less grain boundaries can be obtained. Further, polycrystalline or amorphous semiconductor layer can be prevented from peeling off the substrate by the additional layering of a protecting insulation layer.

摘要翻译： 用于形成半导体单晶膜的晶片结构包括半导体单晶衬底，形成为半导体单晶衬底的一个主表面的沟槽形状的多个凹槽，嵌入到这些凹部内部的绝缘材料，绝缘层 沉积在绝缘材料和半导体单晶衬底上并与绝缘材料一体化，并且将多晶或非晶半导体层重结晶设置在绝缘层上。 可以获得没有或没有晶界的晶片结构。 此外，通过附加的保护绝缘层的分层，可以防止多晶或非晶半导体层从基板上剥离。

公开(公告)号：US4845537A

公开(公告)日：1989-07-04

申请号：US127138

申请日：1987-12-01

申请人： Tadashi Nishimura ,  Kazuyuki Sugahara ,  Shigeru Kusunoki ,  Akihiko Ohsaki

发明人： Tadashi Nishimura ,  Kazuyuki Sugahara ,  Shigeru Kusunoki ,  Akihiko Ohsaki

IPC分类号： H01L27/10 ,  H01L21/336 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/78

CPC分类号： H01L27/10841 ,  H01L29/7827

摘要： A vertical MOS transistor having its channel length determined by the thickness of an insulating layer provided over a semiconductor substrate, rather than by the depth of a trench in which the transistor is formed. As a result, the characteristics of the transistor as relatively unaffected by doping and heat-treatment steps which are performed during formation. Also, the transistor may be formed so as to occupy very little surface area, making it suitable for application in high-density DRAMs. 0O048455372

摘要翻译： 一种垂直MOS晶体管，其沟道长度由设置在半导体衬底上的绝缘层的厚度确定，而不是由形成晶体管的沟槽的深度确定。 结果，晶体管的特性相对不受在形成期间进行的掺杂和热处理步骤的影响。 此外，晶体管可以形成为占据非常小的表面积，使其适用于高密度DRAM。 0048455372

公开(公告)号：US4822752A

公开(公告)日：1989-04-18

申请号：US022717

申请日：1987-03-06

申请人： Kazuyuki Sugahara ,  Tadashi Nishimura ,  Shigeru Kusunoki ,  Yasuo Inoue

发明人： Kazuyuki Sugahara ,  Tadashi Nishimura ,  Shigeru Kusunoki ,  Yasuo Inoue

IPC分类号： H01L21/20 ,  H01L21/268 ,  H01L21/822 ,  H01L29/04 ,  H01L21/306 ,  H01L21/326 ,  H01L21/479

CPC分类号： H01L21/8221 ,  H01L21/2026 ,  H01L21/268 ,  H01L29/045 ,  Y10S117/904 ,  Y10S148/09 ,  Y10S148/091 ,  Y10S148/093

摘要： Disclosed herein is a process for producing a single crystal layer of a semiconductor device, which comprises the steps of providing an oxide insulator layer separated by an opening part for seeding, on a major surface of a single crystal semiconductor substrate of the cubic system, providing a polycrystalline or amorphous semiconductor layer on the entire surface of the insulator layer inclusive of the opening part, then providing a protective layer comprising at least a reflective or anti-reflection film comprising strips of a predetermined width, in a predetermined direction relative to the opening part and at a predetermined interval, the protective layer capable of controlling the temperature distributions in the semiconductor layer at the parts corresponding to the stripes or the parts not corresponding to the stripes, thereby completing a base for producing a semiconductor device, thereafter the surface of the base is irradiated with an energy beam through the striped reflective or anti-reflection film to melt the polycrystalline or amorphous semiconductor and scanning the energy beam in a predetermined direction such that the direction of the crystal of the semiconductor re-solidified and converted into a single crystal accords with a {111} plane, to produce the single crystal of the semiconductor device. Also disclosed is a semiconductor device produced by the method, which comprises a single crystal layer having a wide range of a crystal in a predetermined direction relative to the facial orientation of the major surface of the substrate, and has a three-dimensional semiconductor circuit element construction.

摘要翻译： 本发明公开了一种制造半导体器件的单晶层的方法，其包括以下步骤：在立方晶系的单晶半导体衬底的主表面上提供由用于接种的开口部分开的氧化物绝缘体层，提供 在包括开口部分的绝缘体层的整个表面上的多晶或非晶半导体层，然后提供保护层，该保护层至少包括反射膜或防反射膜，该反射膜或抗反射膜包括相对于开口的预定方向的预定宽度的条 部分并且以预定间隔，保护层能够控制对应于条纹的部分或不对应于条纹的部分的半导体层中的温度分布，从而完成用于制造半导体器件的基底，之后， 用能量束通过条纹反射照射基座 或抗反射膜，以熔化多晶或非晶半导体并沿预定方向扫描能量束，使得半导体晶体的方向重新固化并转换成单晶符合{111}面，以产生 半导体器件的单晶。 还公开了一种通过该方法制造的半导体器件，该半导体器件包括相对于衬底的主表面的面取向在预定方向上具有宽范围的晶体的单晶层，并且具有三维半导体电路元件 施工。

公开(公告)号：US4861418A

公开(公告)日：1989-08-29

申请号：US22402

申请日：1987-03-06

申请人： Tadashi Nishimura ,  Yasuo Inoue ,  Kazuyuki Sugahara ,  Shigeru Kusunoki

发明人： Tadashi Nishimura ,  Yasuo Inoue ,  Kazuyuki Sugahara ,  Shigeru Kusunoki

IPC分类号： H01L21/20 ,  H01L21/263 ,  H01L21/268 ,  H01L21/762 ,  H01L29/04

CPC分类号： H01L29/045 ,  H01L21/2026 ,  H01L21/268 ,  H01L21/76248 ,  Y10S117/904

摘要： A method of manufacturing a semiconductor crystalline layer comprising the following steps: a step of forming, on a single crystalline substrate composed of a semiconductor having a main face on face and having a diamond-type crystal structure, an orientation flat face in which the direction of the intersection with the main face makes a predetermined angle relative to the direction on the main face and which serves as a reference for defining the direction of arranging semiconductor chips formed on the substrate; a step of forming, on the main face of the substrate, an insulation layer at least a portion of which has an opening reaching the main face and which insulates the substrate at the region other than the opening; a step of forming a semiconductor layer composed of a polycrystalline or amorphous semiconductor on the surface of the opening and the insulation layer; a step of forming a reflectivity varying layer which is in the direction in parallel with or vertical to the intersection between the orientation flat face and the main face, has the width and the distance in a predetermined period and is set so as to show periodical reflectivity variation to the argon laser beams; and a step of scanning the argon laser beams under continuous irradiation by way of the reflectivity varying layer to the semiconductor layer in the direction identical with or at an angle within a certain permissible range to the direction of the main face or the direction equivalent thereto.

摘要翻译： 一种制造半导体结晶层的方法，包括以下步骤：在由具有主面的具有金刚石型晶体结构的半导体构成的单晶衬底上形成取向平面 其与主面的交点的方向相对于主面上的方向<110>成预定角度，并且作为用于限定形成在基板上的半导体芯片的排列方向的基准; 在所述基板的主面上形成绝缘层的步骤，所述绝缘层的至少一部分具有到达所述主面的开口，并且使所述基板与所述开口以外的区域绝缘; 在开口和绝缘层的表面上形成由多晶或非晶半导体构成的半导体层的步骤; 在与定向平面和主面之间的交叉部分平行或垂直的方向上形成反射率变化层的步骤具有在预定时间段内的宽度和距离，并且被设置为显示周期性反射率 对氩激光束的变化; 以及通过所述反射率变化层在与所述主面或所述主面的方向<110>的一定允许范围内相同或成一定角度的方向将所述氩激光束扫描到所述半导体层的步骤 相当于此。

公开(公告)号：US5371381A

公开(公告)日：1994-12-06

申请号：US587500

申请日：1990-09-24

申请人： Kazuyuki Sugahara ,  Tadashi Nishimura ,  Shigeru Kusunoki ,  Yasuo Inoue

发明人： Kazuyuki Sugahara ,  Tadashi Nishimura ,  Shigeru Kusunoki ,  Yasuo Inoue

IPC分类号： H01L21/20 ,  H01L21/268 ,  H01L21/822 ,  H01L29/04 ,  H01L27/04

CPC分类号： H01L21/8221 ,  H01L21/2026 ,  H01L21/268 ,  H01L29/045 ,  Y10S117/904 ,  Y10S148/09 ,  Y10S148/091 ,  Y10S148/093

摘要： Disclosed herein is a process for producing a single crystal layer of a semiconductor device, which comprises the steps of providing an oxide insulator layer separated by an opening part for seeding, on a major surface of a single crystal semiconductor substrate of the cubic system, providing a polycrystalline or amorphous semiconductor layer on the entire surface of the insulator layer inclusive of the opening part, then providing a protective layer comprising at least a reflective or anti-reflection film comprising stripes of a predetermined width, in a predetermined direction relative to the opening part and at a predetermined interval, the protective layer capable of controlling the temperature distributions in the semiconductor layer at the parts corresponding to the stripes or the parts not corresponding to the stripes, thereby completing a base for producing a semiconductor device, thereafter the surface of the base is irradiated with an energy beam through the striped reflective or anti-reflection film to melt the polycrystalline or amorphous semiconductor and scanning the energy beam in a predetermined direction such that the direction of the crystal of the semiconductor re-solidified and converted into a single crystal accords with a {111} plane, to produce the single crystal of the semiconductor device. Also disclosed is a semiconductor device produced by the method, which comprises a single crystal layer having a wide range of a crystal in a predetermined direction relative to the facial orientation of the major surface of the substrate, and has a three-dimensional semiconductor circuit element construction.

摘要翻译： 本发明公开了一种制造半导体器件的单晶层的方法，其包括以下步骤：在立方晶系的单晶半导体衬底的主表面上提供由用于接种的开口部分开的氧化物绝缘体层，提供 在包括开口部分的绝缘体层的整个表面上的多晶或非晶半导体层，然后提供保护层，该保护层至少包括反射膜或防反射膜，该反射膜或防反射膜包含预定宽度的条，相对于开口 部分并且以预定间隔，保护层能够控制对应于条纹的部分或不对应于条纹的部分的半导体层中的温度分布，从而完成用于制造半导体器件的基底，之后， 通过条纹反射照射能量束 e或抗反射膜，以熔化多晶或非晶半导体并沿预定方向扫描能量束，使得半导体晶体的方向重新固化并转换成单晶符合{111}面，至 产生半导体器件的单晶。 还公开了一种通过该方法制造的半导体器件，该半导体器件包括相对于衬底的主表面的面取向在预定方向上具有宽范围的晶体的单晶层，并且具有三维半导体电路元件 施工。