公开(公告)号：US09097690B2

公开(公告)日：2015-08-04

申请号：US13388813

申请日：2010-09-17

申请人： Shigeru Yano ,  Atsushi Suzuki ,  Yasushi Aoki ,  Tatsuya Fukugaki

发明人： Shigeru Yano ,  Atsushi Suzuki ,  Yasushi Aoki ,  Tatsuya Fukugaki

IPC分类号： G01N35/02 ,  G01N35/00

CPC分类号： G01N35/02 ,  G01N35/0092 ,  G01N35/026 ,  G01N2035/00326 ,  G01N2035/0462

摘要： In a large-scale analyzing system arrangement with a multi-sample processing capability, connecting a plurality of analyzing systems each having a minimum analyzer configuration makes it difficult for each analyzing system to continue analysis while managing and sharing the consumables information required for measurement between the analyzers. Additionally, since the sample preprocessing and conveying system does not recognize operational states of the analyzing systems during the analysis, conveyance of the sample to an analyzing system unable to conduct the analysis is likely to occur, resulting in delays in reporting the test results on the sample. The internal operational status of a plurality of analyzing systems is collectively managed and samples are conveyed between the analyzing systems. If the analysis is determined not to be capable of being continued, the sample is temporarily placed in a stand-by condition and then the analysis, after returning to a restartable state, is automatically continued.

摘要翻译： 在具有多样本处理能力的大规模分析系统布置中，连接多个具有最小分析器配置的分析系统使得每个分析系统难以继续分析，同时管理和共享在 分析仪 另外，由于样本预处理和传送系统在分析过程中不能识别分析系统的运行状态，因此很可能将样品运送到不能进行分析的分析系统，导致测试结果报告延迟 样品。 集体管理多个分析系统的内部操作状态，并在分析系统之间传送样品。 如果确定分析不能继续进行，则将样品暂时置于待机状态，然后在返回到可重启状态之后自动继续进行分析。

公开(公告)号：US20120179405A1

公开(公告)日：2012-07-12

申请号：US13388813

申请日：2010-09-17

申请人： Shigeru Yano ,  Atsushi Suzuki ,  Yasushi Aoki ,  Tatsuya Fukugaki

发明人： Shigeru Yano ,  Atsushi Suzuki ,  Yasushi Aoki ,  Tatsuya Fukugaki

IPC分类号： G06F19/00 ,  G01D5/02

CPC分类号： G01N35/02 ,  G01N35/0092 ,  G01N35/026 ,  G01N2035/00326 ,  G01N2035/0462

摘要： In a large-scale analyzing system arrangement with a multi-sample processing capability, connecting a plurality of analyzing systems each having a minimum analyzer configuration makes it difficult for each analyzing system to continue analysis while managing and sharing the consumables information required for measurement between the analyzers. Additionally, since the sample preprocessing and conveying system does not recognize operational states of the analyzing systems during the analysis, conveyance of the sample to an analyzing system unable to conduct the analysis is likely to occur, resulting in delays in reporting the test results on the sample. The internal operational status of a plurality of analyzing systems is collectively managed and samples are conveyed between the analyzing systems. If the analysis is determined not to be capable of being continued, the sample is temporarily placed in a stand-by condition and then the analysis, after returning to a restartable state, is automatically continued.

摘要翻译： 在具有多样本处理能力的大规模分析系统布置中，连接多个具有最小分析器配置的分析系统使得每个分析系统难以继续分析，同时管理和共享在 分析仪 另外，由于样品预处理和输送系统在分析过程中不能识别分析系统的运行状态，所以很可能将样品运送到不能进行分析的分析系统，导致测试结果报告延迟 样品。 集体管理多个分析系统的内部操作状态，并在分析系统之间传送样品。 如果确定分析不能继续进行，则将样品暂时置于待机状态，然后在返回到可重启状态之后自动继续进行分析。

公开(公告)号：US08718214B2

公开(公告)日：2014-05-06

申请号：US13403124

申请日：2012-02-23

申请人： Yasushi Aoki

发明人： Yasushi Aoki

IPC分类号： H04L25/00

CPC分类号： H04L25/0274

摘要： Reducing jitter in signal wiring without requiring a larger circuit scale is difficult in the technology of the related art. A signal wiring system to resolve the above problem therefore includes an output unit to output a differential signal, a receiver unit to receive differential signals from the output unit, a jitter suppression circuit to suppress the amount of the jitter in the differential signal received by the receiver unit according to a suppression coefficient, and a signal wiring unit for conveying a differential signal from the output unit and including a wiring length set according to a suppression coefficient in the jitter suppression circuit.

摘要翻译： 在相关技术的技术中，难以减少信号布线中的抖动而不需要较大的电路规模。 因此，解决上述问题的信号布线系统包括：输出单元，用于输出差分信号;接收单元，用于从输出单元接收差分信号;抖动抑制电路，用于抑制由该输出单元接收的差分信号中的抖动量; 接收器单元，以及用于传送来自输出单元的差分信号并包括根据抖动抑制电路中的抑制系数设置的布线长度的信号布线单元。

公开(公告)号：US07840727B2

公开(公告)日：2010-11-23

申请号：US11491919

申请日：2006-07-25

申请人： Takanori Saeki ,  Yasushi Aoki ,  Masatomo Eimitsu ,  Masashi Nakagawa ,  Minoru Nishizawa ,  Tadashi Iwasaki ,  Koichiro Kiguchi

发明人： Takanori Saeki ,  Yasushi Aoki ,  Masatomo Eimitsu ,  Masashi Nakagawa ,  Minoru Nishizawa ,  Tadashi Iwasaki ,  Koichiro Kiguchi

IPC分类号： G06F13/12 ,  G06F9/44

CPC分类号： G06F13/4018 ,  Y02D10/14 ,  Y02D10/151

摘要： Disclosed is a serial-to-parallel converter/parallel-to-serial converter/FIFO unified circuit which includes a register, a selector and a counter. The register receives serial input data and converts the serial data into parallel data based on frequency-divided multi-phase clock signals from a counter. The selector receives the parallel data from the register to select one of the data in accordance with a control signal. The counter generates the control signal for the selector so that plural items of data will be output serially from the selector in the sequence in which the plural items data have been serially supplied to the register.

摘要翻译： 公开了一种串并转换器/并 - 串转换器/ FIFO统一电路，其包括寄存器，选择器和计数器。 寄存器接收串行输入数据，并根据来自计数器的分频多相时钟信号将串行数据转换为并行数据。 选择器从寄存器接收并行数据，以根据控制信号选择一个数据。 计数器产生用于选择器的控制信号，使得多个数据项目将从串行提供给寄存器的顺序从选择器串行地输出。

公开(公告)号：US07837898B2

公开(公告)日：2010-11-23

申请号：US11661926

申请日：2006-05-26

申请人： Takeshi Takahara ,  Yasushi Aoki ,  Takashi Murase

发明人： Takeshi Takahara ,  Yasushi Aoki ,  Takashi Murase

IPC分类号： C09K11/61

CPC分类号： C09K11/7734 ,  C09K11/0883

摘要： A green-light-emitting phosphor of a high emission brightness when excited by blue light emitted from a blue LED is provided. The green-light-emitting phosphor is represented by a formula M1-aSi2O2-1/2nXnN2:Eua, wherein M is at least one element of strontium (Sr), barium (Ba) and calcium (Ca); X is at least one element of chlorine (Cl) and bromine (Br); a is 0.005≦a≦0.15 and n is 0.02≦n≦0.2. Substitution of a part of the oxygen (O) in a matrix with at least one halogen element of chlorine (Cl) and bromine (Br) gives a green-light-emitting phosphor of higher brightness.

摘要翻译： 提供了从蓝色LED发射的蓝色光激发时发光亮度高的绿色发光荧光体。 绿色发光荧光体由式M1-aSi2O2-1 / 2nXnN2：Eua表示，其中M是锶（Sr），钡（Ba）和钙（Ca）中的至少一种元素; X是氯（Cl）和溴（Br）中的至少一种元素; a为0.005＆nlE; a＆nlE; 0.15和n为0.02＆nlE; n＆nlE; 0.2。 用氧（Cl）和溴（Br）的至少一种卤素元素将一部分氧（O）取代为基质，得到更高亮度的绿色发光荧光体。

公开(公告)号：US07579765B2

公开(公告)日：2009-08-25

申请号：US12169661

申请日：2008-07-09

申请人： Takeshi Takahara ,  Yasushi Aoki ,  Takashi Murase

发明人： Takeshi Takahara ,  Yasushi Aoki ,  Takashi Murase

IPC分类号： H01J63/04

CPC分类号： C09K11/7792

摘要： An orange-emitting phosphor that emits at a high luminance when being excited by blue light emitted by a blue light-emitting diode is provided. This orange-emitting phosphor is an alkaline-earth metal silicate-based phosphor represented by a general formula of a(Sr1-xEux(1-y)Ybxy)O.SiO2. In the formula, a is provided as 2.9≦a≦3.1, x is provided as 0.005≦x≦0.10, and y is provided as 0.001≦y≦0.1. An orange-emitting phosphor that emits orange at a high luminance and produces no harmful gas is provided.

摘要翻译： 提供了当由蓝色发光二极管发出的蓝色光激发时以高亮度发射的发橙色荧光体。 该橙色发光荧光体是由（Sr1-xEux（1-y）Ybxy）O.SiO2的通式表示的碱土金属硅酸盐系荧光体。 在该式中，a为2.9 <= a <= 3.1，x为0.005 <= x <= 0.10，y为0.001 <= y <= 0.1。 提供以高亮度发出橙色并且不产生有害气体的橙色发光荧光体。

公开(公告)号：US20090091364A1

公开(公告)日：2009-04-09

申请号：US12232144

申请日：2008-09-11

申请人： Yasushi Aoki

发明人： Yasushi Aoki

IPC分类号： H03K3/017

CPC分类号： H03K3/35613

摘要： A semiconductor circuit according to the present invention includes: a differential input section to receive input differential signals; a load resistance section to output a voltage according to a current output by the differential input section; differential signal output terminals to output a differential signal corresponding to the voltage output from the load resistance section; a low-pass filter to extract a direct-current component of the differential signal output from the differential signal output terminals; and a load adjustment section to feed back the direct-current component extracted by the low-pass filter to adjust a resistance value of the load resistance section.

摘要翻译： 根据本发明的半导体电路包括：差分输入部分，用于接收输入差分信号; 负载电阻部分，用于根据由差分输入部分输出的电流输出电压; 差分信号输出端子输出对应于从负载电阻部分输出的电压的差分信号; 一个低通滤波器，用于提取从差分信号输出端输出的差分信号的直流分量; 以及负载调整部，对由低通滤波器提取的直流分量进行反馈，调整负载电阻部的电阻值。

公开(公告)号：US20080228367A1

公开(公告)日：2008-09-18

申请号：US12075914

申请日：2008-03-14

申请人： Yasushi Aoki ,  Jiro Suzuki ,  Kouji Sakai

发明人： Yasushi Aoki ,  Jiro Suzuki ,  Kouji Sakai

IPC分类号： B60T11/12

CPC分类号： B60T1/10 ,  B60K6/48 ,  B60T8/3655 ,  B60T8/4827 ,  B60T8/4872 ,  B60T13/686 ,  B60W10/184 ,  B60W30/18127 ,  Y02T10/6221

摘要： In a four wheel simultaneous control mode when a regeneration cooperative braking is implemented, a pair of electromagnetic control valves 17A, 17B and one of normally closed electromagnetic valves 19FL, 19FR corresponding to regeneration side left and right wheel brakes 5FL, 5FR and normally closed electromagnetic valves 19RL, 19RR corresponding to non-regeneration side left and right wheel brakes 5RL, 5RR are caused to operate to open and close, while the other of the normally closed electromagnetic valves 19FL, 19FR corresponding to the regeneration side left and right wheel brakes 5FL, 5FR and the normally closed electromagnetic valves 19RL, 19RR corresponding to the non-regeneration side left and right wheel brakes 5RL, 5RR are put in inoperative states in which the valves concerned are kept closed, and all normally open electromagnetic valves 18FL, 18RR, 18FR, 18RL are put in inoperative states in which the valves concerned are kept opened.

摘要翻译： 在实现再生合作制动的四轮同时控制模式中，一对电磁控制阀17A，17B以及对应于再生侧左右轮制动器5 FL的常闭电磁阀19FL，19FR中的一个， 5 FR和常闭电磁阀19 RL，19 RR对应于非再生侧左右两轮制动器5 RL，5 RR操作打开和关闭，而另一个常闭电磁阀19 FL，19 对应于再生侧的左侧和右侧制动器5FL，5FR和对应于非再生侧左右制动器5 RL，5 RR的常闭电磁阀19 RL，19 RR的FR被置于不可操作状态 所关闭的阀门保持关闭，所有常开电磁阀18 FL，18 RR，18 FR，18 RL都处于不能工作的状态，在这些状态下，有关阀门保持打开状态。

公开(公告)号：US07345602B2

公开(公告)日：2008-03-18

申请号：US11493602

申请日：2006-07-27

申请人： Takanori Saeki ,  Yasushi Aoki ,  Tadashi Iwasaki ,  Toshihiro Narisawa ,  Makoto Tanaka ,  Yoichi Iizuka ,  Nobuhiro Ooki

发明人： Takanori Saeki ,  Yasushi Aoki ,  Tadashi Iwasaki ,  Toshihiro Narisawa ,  Makoto Tanaka ,  Yoichi Iizuka ,  Nobuhiro Ooki

IPC分类号： H03M9/00

CPC分类号： H03M9/00

摘要： Disclosed is a pre-emphasis circuit including a first parallel-to-serial converter, a second parallel-to-serial converter, a mixing circuit and a clock generating circuit. The first parallel-to-serial converter converts parallel data into first serial data, and the second parallel-to-serial converter converts the parallel data into second serial data. The mixing circuit receives the first serial data from the first parallel-to-serial converter and the second serial data from the second parallel-to-serial converter to output a signal emphasizing a change point of the first serial data. The clock generating circuit outputs a first set of clocks made up of clocks having mutually different phases and a second set of clocks made up of clocks having mutually different phases to the first and second parallel-to-serial converters, respectively. The first phase clock of the second set of clocks corresponds to the second phase clock of the first set of clocks.

摘要翻译： 公开了一种包括第一并行转换器，第二并行到串行转换器，混合电路和时钟发生电路的预加重电路。 第一个并行到串行转换器将并行数据转换为第一个串行数据，第二个并行到串行转换器将并行数据转换成第二个串行数据。 混合电路从第一并行转换器接收第一串行数据和来自第二并行 - 串行转换器的第二串行数据，以输出强调第一串行数据的变化点的信号。 时钟发生电路分别输出由具有相互不同相位的时钟构成的第一组时钟和由具有相互不同相位的时钟组成的第二组时钟，分别与第一和第二并行 - 串行转换器。 第二组时钟的第一相位时钟对应于第一组时钟的第二相位时钟。

公开(公告)号：US06940228B2

公开(公告)日：2005-09-06

申请号：US10458385

申请日：2003-06-10

申请人： Yasushi Aoki ,  Masahiro Katoh

发明人： Yasushi Aoki ,  Masahiro Katoh

IPC分类号： F21S2/00 ,  F21Y101/00 ,  H01J17/04 ,  H01J17/20 ,  H01J61/06 ,  H01J61/073 ,  H01J61/86 ,  H01J61/88 ,  H01J61/73

CPC分类号： H01J61/86 ,  H01J61/0735

摘要： A high-pressure discharge lamp comprises a lamp tube made of quartz glass and having a central portion formed in a spherical shape, and a pair of opposing tungsten electrodes inserted into the lamp tube. At least one of the tungsten electrodes is made of a tungsten material which contains more than 10 ppm of one of Co and Ni, or 10 ppm of Co and Ni in total, or a tungsten material which contains 20 ppm or more of at least two of Fe, Co and Ni in total, or a tungsten material which contains 20 ppm or more of Fe. Fe, Co and Ni belong to iron-group metals. The inter-electrode distance, i.e., distance between the leading ends of both tungsten electrodes is set to approximately 1-2 mm or less.

摘要翻译： 高压放电灯包括由石英玻璃制成并具有形成为球形的中心部分的灯管和插入到灯管中的一对相对的钨电极。 钨电极中的至少一个由钨材料制成，钨材料含有超过10ppm的Co和Ni中的一种，或总共为10ppm的Co和Ni，或含有20ppm以上的至少两种的钨材料 的Fe，Co和Ni，或含有20ppm以上的Fe的钨材料。 Fe，Co和Ni属于铁族金属。 电极间距离，即两个钨电极的前端之间的距离设定为大约1-2mm或更小。