公开(公告)号：US5464989A

公开(公告)日：1995-11-07

申请号：US245305

申请日：1994-05-17

Applicant: Shinichi Mori ,  Osamu Ueda ,  Masayuki Yamashita

Inventor： Shinichi Mori ,  Osamu Ueda ,  Masayuki Yamashita

IPC: G11C11/56 ,  H01L21/8246 ,  H01L27/112 ,  H01L49/02

CPC classification number: G11C11/5692 ,  H01L27/112 ,  Y10S257/926 ,  Y10S438/981

Abstract: Each of the portions corresponding to the crossings of a plurality of first strip conductive layers serving as bit lines and a plurality of second strip conductive layers serving as word lines crossing the conductive layers at right angles is used as one memory cell. An oxide film is provided between the first strip conductive layers and the second strip conductive layers. The thickness of this oxide film is set in each memory cell according to stored data. Also a multi-value memory can be realized, since the amount of stored data in each memory cell is an arbitrary amount of 1 bit or more by making the stored data of a plurality of types of memory cells having different thicknesses in the tunnel oxide film 15 correspond to a plurality of different data. The size of each memory cell can be reduced since the occupying area of each memory cell on the semiconductor substrate is dependent on the width of the first strip conductive layer and the second strip conductive layer. An insulation film in which tunnel phenomenon is generated can be formed using conventional manufacturing technology.

Abstract translation: 作为用作位线的多个第一带状导电层和作为与导电层成直角交叉的字线的多个第二带状导电层的交叉部分的每个部分被用作一个存储单元。 在第一带状导电层和第二带状导电层之间设置氧化膜。 根据存储的数据，将该氧化膜的厚度设定在各存储单元中。 另外，可以实现多值存储器，因为通过在隧道氧化膜中存储具有不同厚度的多种类型的存储单元的存储数据，每个存储单元中存储的数据量是1位或更多的任意量 15对应于多个不同的数据。 由于半导体衬底上的每个存储单元的占有面积取决于第一带状导电层和第二带状导电层的宽度，因此可以减小每个存储单元的尺寸。 可以使用传统的制造技术形成其中产生隧道现象的绝缘膜。

公开(公告)号：US5394014A

公开(公告)日：1995-02-28

申请号：US149893

申请日：1993-11-10

Applicant: Masahiko Ishikawa ,  Kohji Hayano ,  Shinichi Mori ,  Masayuki Yamashita ,  Osamu Ueda ,  Namiki Moriga

Inventor： Masahiko Ishikawa ,  Kohji Hayano ,  Shinichi Mori ,  Masayuki Yamashita ,  Osamu Ueda ,  Namiki Moriga

IPC: H01L23/06 ,  H01L23/29 ,  H01L23/31 ,  H01L23/552 ,  H01L23/28

CPC classification number: H01L23/552 ,  H01L2224/48247 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01078 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/3025

Abstract: In accordance with one aspect of the present invention, provided is a semiconductor device comprising a semiconductor chip which is directly covered with a resin material having a light shielding property as well as a film which is provided on the resin material for shielding the semiconductor device against light. The film may be formed by a seal having a surface which is covered with a metal and a rear surface which is colored black, a layer of a metal or ceramics which is deposited in a vapor phase, or a coating of an insulating material whose refractive index is different from that of the resin material. In another aspect of the present invention, provided is a semiconductor device which is directly covered with a resin material mixed with a light absorbing material. In still another aspect of the present invention, provided is a semiconductor device comprising a semiconductor chip, having a surface covered with black polyimide, which is further covered with a resin material having a light shielding property. In a further aspect of the present invention, provided is a package for covering a semiconductor device which is mounted on a wiring board. According to such improvement, a light shielding property is improved particularly in relation to a thin semiconductor device whose thickness is only about 1 mm, and the semiconductor device is prevented from a malfunction caused by light.

Abstract translation: 根据本发明的一个方面，提供一种半导体器件，其包括直接由具有遮光性的树脂材料覆盖的半导体芯片以及设置在用于屏蔽半导体器件的树脂材料上的膜 光。 膜可以由具有被金属覆盖的表面和着色为黑色的后表面，以蒸气相沉积的金属或陶瓷层的密封件或者折射率为绝缘材料的绝缘材料的涂层形成， 指数与树脂材料的指数不同。 在本发明的另一方面，提供一种直接用与吸光材料混合的树脂材料覆盖的半导体器件。 在本发明的另一方面，提供一种半导体器件，其包括具有被黑色聚酰亚胺覆盖的表面的半导体芯片，该半导体器件进一步被具有遮光性的树脂材料覆盖。 在本发明的另一方面，提供一种用于覆盖安装在布线板上的半导体器件的封装。 根据这样的改进，特别是相对于厚度仅为1mm的薄型半导体器件而言，防光性能得到改善，并且防止了由于光引起的故障的半导体器件。

公开(公告)号：US5317195A

公开(公告)日：1994-05-31

申请号：US792872

申请日：1991-11-19

Applicant: Masahiko Ishikawa ,  Kohji Hayano ,  Shinichi Mori ,  Masayuki Yamashita ,  Osamu Ueda ,  Namiki Moriga

Inventor： Masahiko Ishikawa ,  Kohji Hayano ,  Shinichi Mori ,  Masayuki Yamashita ,  Osamu Ueda ,  Namiki Moriga

IPC: H01L23/06 ,  H01L23/29 ,  H01L23/31 ,  H01L23/552 ,  H01L23/28

CPC classification number: H01L23/552 ,  H01L2224/48247 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01078 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/3025

Abstract: Provided is a semiconductor device comprising a semiconductor chip which is directly covered with a resin material having a light shielding property as well as a film which is provided on the resin material for shielding the semiconductor device against light. The film may be formed by a seal having a surface which is covered with a metal and a rear surface which is colored black, a layer of a metal or ceramics which is deposited in a vapor phase, or a coating of an insulating material whose refractive index is different from that of the resin material. In another aspect of the present invention, provided is a semiconductor device which is directly covered with a resin material mixed with a light absorbing material. In still another aspect of the present invention, provided is a semiconductor device comprising a semiconductor chip, having a surface covered with black polyimide, which is further covered with a resin material having a light shielding property. In a further aspect of the present invention, provided is a package for covering a semiconductor device which is mounted on a wiring board. According to such improvement, a light shielding property is improved particularly in relation to a thin semiconductor device whose thickness is only about 1 mm, and the semiconductor device is prevented from a malfunction caused by light.

Abstract translation: 提供了一种半导体器件，其包括直接由具有遮光性的树脂材料覆盖的半导体芯片以及设置在用于屏蔽半导体器件的光的树脂材料上的膜。 膜可以由具有被金属覆盖的表面和着色为黑色的后表面，以蒸气相沉积的金属或陶瓷层的密封件或者折射率为绝缘材料的绝缘材料的涂层形成， 指数与树脂材料的指数不同。 在本发明的另一方面，提供一种直接用与吸光材料混合的树脂材料覆盖的半导体器件。 在本发明的另一方面，提供一种半导体器件，其包括具有被黑色聚酰亚胺覆盖的表面的半导体芯片，该半导体器件进一步被具有遮光性的树脂材料覆盖。 在本发明的另一方面，提供一种用于覆盖安装在布线板上的半导体器件的封装。 根据这样的改进，特别是相对于厚度仅为1mm的薄型半导体器件而言，防光性能得到改善，并且防止了由于光引起的故障的半导体器件。

公开(公告)号：US5580809A

公开(公告)日：1996-12-03

申请号：US492217

申请日：1995-06-19

Applicant: Shinichi Mori ,  Osamu Ueda ,  Masayuki Yamashita

Inventor： Shinichi Mori ,  Osamu Ueda ,  Masayuki Yamashita

IPC: G11C11/56 ,  H01L21/8246 ,  H01L27/112

CPC classification number: G11C11/5692 ,  H01L27/112 ,  Y10S257/926 ,  Y10S438/981

Abstract: Each of the portions corresponding to the crossings of a plurality of first strip conductive layers serving as bit lines and a plurality of second strip conductive layers serving as word lines crossing the conductive layers at right angles is used as one memory cell. An oxide film is provided between the first strip conductive layers and the second strip conductive layers. The thickness of this oxide film is set in each memory cell according to stored data. Also a multi-value memory can be realized, since the amount of stored data in each memory cell is an arbitrary amount of 1 bit or more by making the stored data of a plurality of types of memory cells having different thicknesses in the tunnel oxide film 15 correspond to a plurality of different data. The size of each memory cell can be reduced since the occupying area of each memory cell on the semiconductor substrate is dependent on the width of the first strip conductive layer and the second strip conductive layer. An insulation film in which tunnel phenomenon is generated can be formed using conventional manufacturing technology.

Abstract translation: 作为用作位线的多个第一带状导电层和作为与导电层成直角交叉的字线的多个第二带状导电层的交叉部分的每个部分被用作一个存储单元。 在第一带状导电层和第二带状导电层之间设置氧化膜。 根据存储的数据，将该氧化膜的厚度设定在各存储单元中。 另外，可以实现多值存储器，因为通过在隧道氧化膜中存储具有不同厚度的多种类型的存储单元的存储数据，每个存储单元中存储的数据量是1位或更多的任意量 15对应于多个不同的数据。 由于半导体衬底上的每个存储单元的占有面积取决于第一带状导电层和第二带状导电层的宽度，因此可以减小每个存储单元的尺寸。 可以使用传统的制造技术形成其中产生隧道现象的绝缘膜。

公开(公告)号：US5233561A

公开(公告)日：1993-08-03

申请号：US764680

申请日：1991-09-25

Applicant: Shinichi Mori ,  Osamu Ueda

Inventor： Shinichi Mori ,  Osamu Ueda

IPC: G11C17/00 ,  G11C7/10 ,  G11C11/00

CPC classification number: G11C7/1057 ,  G11C11/005 ,  G11C7/1051 ,  G11C7/1078 ,  G11C7/1084

Abstract: A semiconductor storage device formed on a single chip includes a ROM, a RAM and an input/output port. When a mode setting signal designates a normal mode, access is made to one of the ROM, RAM and input/output port in response to an address signal. The ROM is accessed when the mode setting signal designates a ROM write mode and the address signal designates an address assigned to the ROM. A dummy data is output from a data input/output terminal when the mode setting signal designates the ROM write mode, the address signal designates an address outside an address region assigned to the ROM, and a read signal is applied to the device.

Abstract translation: 形成在单个芯片上的半导体存储装置包括ROM，RAM和输入/输出端口。 当模式设置信号指定正常模式时，响应于地址信号，访问ROM，RAM和输入/输出端口中的一个。 当模式设置信号指定ROM写入模式并且地址信号指定分配给ROM的地址时，访问ROM。 当模式设置信号指定ROM写入模式时，从数据输入/输出端子输出虚拟数据，地址信号指定分配给ROM的地址区域之外的地址，并且读取信号被施加到该设备。

公开(公告)号：US20100027066A1

公开(公告)日：2010-02-04

申请号：US12511592

申请日：2009-07-29

Applicant: Yasuhiro NAKAI ,  Satoshi Machino ,  Osamu Ueda

Inventor： Yasuhiro NAKAI ,  Satoshi Machino ,  Osamu Ueda

IPC: G06F15/00

CPC classification number: H04N1/00496 ,  H04N1/00493

Abstract: A display-integrated image forming apparatus is provided that requires no large disposition location and an extremely simple disposition operation and that is capable of acquiring sufficient advertising effects for pedestrians on sidewalks.The display-integrated image forming apparatus comprises an image forming device including a document reading portion and a printing portion and a displaying device including a first display screen viewable from the backside or the side of the image forming device. When a user selects arbitrary information from provision information displayed on the first display screen, the first display screen displays information related to printing such as a password. By operating the image forming device to input the password the user visually recognizing the information is able to print out information preliminarily correlated with the selected provision information.

Abstract translation: 提供了一种显示器集成图像形成装置，其不需要大的布置位置和非常简单的布置操作，并且能够对人行道上的行人获得足够的广告效果。 显示器集成图像形成装置包括：图像形成装置，包括文件读取部分和打印部分;以及显示装置，包括可从图像形成装置的背面或侧面观看的第一显示屏幕。 当用户从显示在第一显示屏幕上的提供信息中选择任意信息时，第一显示屏幕显示诸如密码之类的打印相关信息。 通过操作图像形成装置以输入密码，用户可视地识别信息能够打印与所选择的提供信息预先相关的信息。

公开(公告)号：US20050134508A1

公开(公告)日：2005-06-23

申请号：US10812932

申请日：2004-03-31

Applicant: Osamu Ueda

Inventor： Osamu Ueda

IPC: H01Q13/08 ,  H01Q1/38 ,  H01Q5/10 ,  H01Q5/35 ,  H01Q5/40 ,  H01Q9/04

CPC classification number: H01Q9/0414 ,  H01Q5/40 ,  H01Q9/0464

Abstract: A multi-band flat antenna that shows excellent radio characteristics in each of multiple different frequency bands. In a patch antenna, a plurality of flat antenna patterns for different frequency bands are formed on a dielectric substrate. The dielectric substrate has different plate thicknesses in each of the regions where the flat antenna patterns are formed.

Abstract translation: 一种多频带平面天线，其在多个不同频带的每一个中显示出优异的无线电特性。 在贴片天线中，在电介质基板上形成用于不同频带的多个平面天线图案。 电介质基板在形成平面天线图案的各个区域中具有不同的板厚度。

公开(公告)号：US06380974B1

公开(公告)日：2002-04-30

申请号：US09405557

申请日：1999-09-25

Applicant: Teruo Hieda ,  Osamu Ueda ,  Norihiro Kawahara

Inventor： Teruo Hieda ,  Osamu Ueda ,  Norihiro Kawahara

IPC: H04N5228

CPC classification number: H04N9/045 ,  H04N5/2628 ,  H04N5/772 ,  H04N9/804 ,  H04N2209/046 ,  Y10S358/906

Abstract: In order to achieve a digital video camera apparatus which decreases the number of components and facilitates connection with a digital VTR, a luminance signal Y and a color signal C input form external input terminals (110, 118) are converted into digital signals by A/D converters (136, 138) by sampling these signals respectively at the sampling frequency of a digital recording/reproduction device (113) and a frequency four times the subcarrier frequency, the digital signals are selected by selectors (135, 137) together with signals Y and C from a digital signal processing circuit (106), and the selected signals are supplied to the digital signal recording/reproduction device (113). Color-difference signals are supplied after their frequency is converted into the sampling frequency of the digital signal recording/reproduction device (113) by frequency converters (139a, 139b).

Abstract translation: 为了实现减少部件数量并促进与数字VTR连接的数字摄像机装置，从外部输入端子（110,118）输入的亮度信号Y和彩色信号C通过A / D转换成数字信号， D转换器（136,138），分别以数字记录/再现设备（113）的采样频率和频率为副载波频率的四倍采样这些信号，数字信号由选择器（135,137）和信号 来自数字信号处理电路（106）的Y和C，并且所选择的信号被提供给数字信号记录/再现装置（113）。 在通过变频器（139a，139b）将其频率转换成数字信号记录/再现装置（113）的采样频率之后，提供色差信号。

公开(公告)号：US5663841A

公开(公告)日：1997-09-02

申请号：US502086

申请日：1995-07-12

Applicant: Taichi Akiba ,  Osamu Ueda ,  Masayuki Koyama ,  Shigeyuki Sasanuma

Inventor： Taichi Akiba ,  Osamu Ueda ,  Masayuki Koyama ,  Shigeyuki Sasanuma

IPC: G11B7/09 ,  G02B7/04 ,  G11B7/095

CPC classification number: G11B7/0935 ,  G11B7/093

Abstract: A holder is suspended on a carriage, and a magnetic circuit is disposed adjacent to the holder. The magnetic circuit has a first magnetic pole and a second magnetic pole. A focus coil having a magnetic flux receiving portion is provided around a vertical axis of the holder. A tacking coil having a magnetic flux receiving portion is provided around a horizontal axis of the holder. Both the magnetic flux receiving portions are disposed so as not to be overlapped with each other, and disposed in parallel with one of the surface of the first and second magnetic poles. Both of the magnetic flux receiving portions are flush with each other.

Abstract translation: 支架悬挂在支架上，并且磁路设置在支架附近。 磁路具有第一磁极和第二磁极。 具有磁通量接收部分的聚焦线圈围绕保持器的垂直轴设置。 具有磁通量接收部分的固定线圈围绕保持器的水平轴设置。 这两个磁通量接收部被配置为不彼此重叠，并且与第一和第二磁极的表面中的一个平行地设置。 两个磁通量接收部分彼此齐平。

公开(公告)号：US5195099A

公开(公告)日：1993-03-16

申请号：US908808

申请日：1992-07-07

Applicant: Osamu Ueda ,  Tsuyoshi Toyama

Inventor： Osamu Ueda ,  Tsuyoshi Toyama

IPC: H03M13/00

CPC classification number: H03M13/00

Abstract: A semiconductor memory device having an error correcting circuit includes a circuit for generating a desired test signal with which memory cells used for error correction are to be tested, and another circuit for judging on an chip-basis whether memory cells of the semiconductor memory device are normal or not. The memory cells for error correction can be tested accurately by application of desired test signal. In addition, since there is no necessity of provision of a circuit for comparing externally applied data and data delivered from the semiconductor memory device, a test can be preformed readily.

Abstract translation: 具有误差校正电路的半导体存储器件包括：电路，用于产生用于测试用于纠错的存储器单元的期望的测试信号，以及用于基于芯片判断半导体存储器件的存储单元是否为 正常与否 用于纠错的存储单元可以通过应用所需的测试信号进行准确测试。 此外，由于不需要提供用于比较外部施加的数据和从半导体存储器件传送的数据的电路，因此可以容易地进行测试。