公开(公告)号：US07799589B2

公开(公告)日：2010-09-21

申请号：US12076617

申请日：2008-03-20

申请人： Shoji Akiyama ,  Yoshihiro Kuboto ,  Atsuo Ito ,  Koichi Tanaka ,  Yuuji Tobisaka ,  Makoto Kawai

发明人： Shoji Akiyama ,  Yoshihiro Kuboto ,  Atsuo Ito ,  Koichi Tanaka ,  Yuuji Tobisaka ,  Makoto Kawai

IPC分类号： H01L21/00

CPC分类号： G02B6/132 ,  G02B6/1347 ,  G02F1/0126 ,  G02F1/025 ,  G02F2202/105 ,  G02F2203/48 ,  Y10S438/967

摘要： An optical waveguide apparatus having a very simple structure that can modulate a signal light guided through an optical waveguide is provided. A photoresist 13 is applied to an upper side of an SOI film 12, a photoresist mask 14 is formed, and the SOI film in a region that is not covered with the photoresist mask 14 is removed by etching to obtain an optical waveguide 15 having a single-crystal silicon core. Further, a light emitting device capable of irradiating the single-crystal silicon core with a light having a wavelength of 1.1 μm or below is provided on a back surface side of a quartz substrate 20 to provide an optical waveguide apparatus. When the light emitting device 30 does not apply a light, the light guided through the optical waveguide 15 is guided as it is. However, when the light emitting device 30 applies a light to form each pair of an electron and a hole in the irradiated region 16, the light guided through the optical waveguide 15 is absorbed by the pair of an electron and a hole, thereby enabling switching (modulation) for turning ON/OFF an optical signal depending on presence/absence (ON or OFF) of application of the light from the light emitting device 30.

摘要翻译： 提供一种具有可以调制通过光波导引导的信号光的非常简单结构的光波导装置。 将光致抗蚀剂13施加到SOI膜12的上侧，形成光致抗蚀剂掩模14，并且通过蚀刻除去未被光致抗蚀剂掩模14覆盖的区域中的SOI膜，以获得具有 单晶硅芯。 此外，在石英基板20的背面侧设置能够用波长为1.1μm以下的光照射单晶硅芯的发光装置，以提供光波导装置。 当发光器件30不施加光时，通过光波导15引导的光被原样引导。 然而，当发光器件30在照射区域16中施加光以形成每对电子和空穴时，通过光波导15引导的光被一对电子和空穴吸收，从而能够切换 （调制），用于根据来自发光装置30的光的施加的存在/不存在（ON或OFF）来接通/关闭光信号。

公开(公告)号：US08268700B2

公开(公告)日：2012-09-18

申请号：US12153160

申请日：2008-05-14

申请人： Shoji Akiyama ,  Yoshihiro Kubota ,  Atsuo Ito ,  Koichi Tanaka ,  Makoto Kawai ,  Yuuji Tobisaka

发明人： Shoji Akiyama ,  Yoshihiro Kubota ,  Atsuo Ito ,  Koichi Tanaka ,  Makoto Kawai ,  Yuuji Tobisaka

IPC分类号： H01L21/30

CPC分类号： H01L21/76254

摘要： There is disclosed a method for manufacturing an SOI wafer comprising at least: implanting a hydrogen ion, a rare gas ion, or both the ions into a donor wafer formed of a silicon wafer or a silicon wafer having an oxide film formed on a surface thereof from a surface of the donor wafer, thereby forming an ion implanted layer; performing a plasma activation treatment with respect to at least one of an ion implanted surface of the donor wafer and a surface of a handle wafer, the surface of the handle wafer is to be bonded to the ion implanted surface; closely bonding these surfaces to each other; mechanically delaminating the donor wafer at the ion implanted layer as a boundary and thereby reducing a film thickness thereof to provide an SOI layer, and performing a heat treatment at 600 to 1000° C.; and polishing a surface of the SOI layer for 10 to 50 nm based on chemical mechanical polishing.A method for manufacturing with excellent productivity an SOI wafer having an SOI layer with a mirror-finished surface and high film thickness uniformity can be provided.

摘要翻译： 公开了一种制造SOI晶片的方法，该方法至少包括：将氢离子，稀有气体离子或两者离子注入到由硅晶片或具有在其表面上形成的氧化膜的硅晶片形成的施主晶片中 从施主晶片的表面，从而形成离子注入层; 对施主晶片的离子注入表面和处理晶片的表面中的至少一个进行等离子体激活处理，把手晶片的表面与离子注入表面结合; 将这些表面彼此紧密结合; 以离子注入层的施主晶片作为边界进行机械分层，由此降低其膜厚以提供SOI层，并在600〜1000℃下进行热处理。 并且基于化学机械抛光将SOI层的表面抛光10至50nm。 可以提供具有优异的生产率的具有SOI层的具有镜面精加工表面和高膜厚均匀性的SOI晶片的方法。

公开(公告)号：US08030118B2

公开(公告)日：2011-10-04

申请号：US11976021

申请日：2007-10-19

申请人： Atsuo Ito ,  Shoji Akiyama ,  Makoto Kawai ,  Koichi Tanaka ,  Yuuji Tobisaka ,  Yoshihiro Kubota

发明人： Atsuo Ito ,  Shoji Akiyama ,  Makoto Kawai ,  Koichi Tanaka ,  Yuuji Tobisaka ,  Yoshihiro Kubota

IPC分类号： H01L21/00

CPC分类号： H01L31/068 ,  H01L31/022466 ,  H01L31/1884 ,  H01L31/1896 ,  Y02B10/10 ,  Y02E10/547

摘要： A method for producing a single crystal silicon solar cell including the steps of: implanting ions into a single crystal silicon substrate through an ion implanting surface thereof; closely contacting the single crystal silicon substrate and a transparent insulator substrate with each other via a transparent electroconductive adhesive while using the ion implanting surface as a bonding surface; curing and maturing the transparent electroconductive adhesive into a transparent electroconductive film; applying an impact to the ion implanted layer to mechanically delaminate the single crystal silicon substrate to leave a single crystal silicon layer; and forming a p-n junction in the single crystal silicon layer.

公开(公告)号：US07879175B2

公开(公告)日：2011-02-01

申请号：US12078276

申请日：2008-03-28

申请人： Makoto Kawai ,  Yoshihiro Kubota ,  Atsuo Ito ,  Koichi Tanaka ,  Yuuji Tobisaka ,  Shoji Akiyama

发明人： Makoto Kawai ,  Yoshihiro Kubota ,  Atsuo Ito ,  Koichi Tanaka ,  Yuuji Tobisaka ,  Shoji Akiyama

IPC分类号： B32B38/10

CPC分类号： H01L21/76254 ,  C23C14/48

摘要： Wettability of a PBN material surface with respect to a metal is improved to expand use applications. Hydrogen ions are implanted into a surface of a silicon substrate 10 to form an ion implanted region 11 at a predetermined depth near a surface of the silicon substrate 10, and a plasma treatment or an ozone treatment is performed with respect to a main surface of the silicon substrate 10 for the purpose of surface cleaning or surface activation. The main surfaces of the silicon substrate 10 and a PBN substrate 20 subjected to the surface treatment are appressed against each other to be bonded at a room temperature, and an external impact shock is given to the bonded substrate to mechanically delaminate a silicon film 12 from a bulk 13 of the silicon substrate to be transferred. An obtained PBN composite substrate 30 is diced to form a chip having a desired size, and a refractory metal is metallized on the silicon film 12 side to be connected with a wiring material.

摘要翻译： PBN材料表面相对于金属的润湿性得到改善以扩大使用应用。 将氢离子注入到硅衬底10的表面中以在硅衬底10的表面附近的预定深度处形成离子注入区11，并且相对于硅衬底10的主表面进行等离子体处理或臭氧处理 硅基板10，用于表面清洁或表面活化。 经过表面处理的硅衬底10和PBN衬底20的主表面在室温下相互粘合，并且对键合衬底施加外部冲击冲击，从而将硅膜12从 待转移的硅衬底的体积13。 将获得的PBN复合基板30切割成具有所需尺寸的芯片，并且将难熔金属在硅膜12侧金属化以与布线材料连接。

公开(公告)号：US20100311221A1

公开(公告)日：2010-12-09

申请号：US12805582

申请日：2010-08-06

申请人： Shoji Akiyama ,  Yoshihiro Kubota ,  Atsuo Ito ,  Koichi Tanaka ,  Makoto Kawai ,  Yuuji Tobisaka

发明人： Shoji Akiyama ,  Yoshihiro Kubota ,  Atsuo Ito ,  Koichi Tanaka ,  Makoto Kawai ,  Yuuji Tobisaka

IPC分类号： H01L21/762

CPC分类号： H01L21/76254 ,  H01L27/1266 ,  H01L29/78603

摘要： Hydrogen ions are implanted to a surface (main surface) of the single crystal Si substrate 10 at a dosage of 1.5×1017 atoms/cm2 or higher to form the hydrogen ion implanted layer (ion-implanted damage layer) 11. As a result of the hydrogen ion implantation, the hydrogen ion implanted boundary 12 is formed. The single crystal Si substrate 10 and the low melting glass substrate 20 are bonded together. The bonded substrate is heated at relatively low temperature, 120° C. or higher and 250° C. or lower (below a melting point of the support substrate). Further, an external shock is applied to delaminate the Si crystal film along the hydrogen ion implanted boundary 12 of the single crystal Si substrate 10 out of the heat-treated bonded substrate. Then, the surface of the resultant silicon thin film 13 is polished to remove a damaged portion, so that a semiconductor substrate can be fabricated. There can be provided a semiconductor substrate in which a high-quality silicon thin film is transferred onto a substrate made of a low melting point material.

摘要翻译： 将氢离子以1.5×10 17原子/ cm 2或更高的剂量注入单晶Si衬底10的表面（主表面），以形成氢离子注入层（离子注入损伤层）11。 氢离子注入，形成氢离子注入边界12。 单晶Si衬底10和低熔点玻璃衬底20结合在一起。 键合衬底在相对较低的温度，120℃或更高和250℃或更低（低于支撑衬底的熔点）下加热。 此外，施加外部冲击以沿着经热处理的键合衬底的单晶Si衬底10的氢离子注入边界12将Si晶体膜分层。 然后，对所得的硅薄膜13的表面进行抛光以去除损坏部分，从而可以制造半导体衬底。 可以提供一种半导体衬底，其中将高质量的硅薄膜转移到由低熔点材料制成的衬底上。

公开(公告)号：US20100227452A1

公开(公告)日：2010-09-09

申请号：US12161819

申请日：2007-02-08

申请人： Shoji Akiyama ,  Yoshihiro Kubota ,  Atsuo Ito ,  Makoto Kawai ,  Yuuji Tobisaka ,  Koichi Tanaka

发明人： Shoji Akiyama ,  Yoshihiro Kubota ,  Atsuo Ito ,  Makoto Kawai ,  Yuuji Tobisaka ,  Koichi Tanaka

IPC分类号： H01L21/762

CPC分类号： H01L21/76254 ,  H01L21/2007 ,  H01L27/1203 ,  H01L27/1214 ,  H01L29/78603

摘要： A heating plate having a smooth surface is placed on a hot plate which constitutes a heating section, and the smooth surface of the heating plate is closely adhered on the rear surface of a single-crystal Si substrate bonded to a transparent insulating substrate. The temperature of the heating plate is kept at 200° C. or higher but not higher than 350° C. When the rear surface of the single-crystal Si substrate bonded to the insulating substrate is closely adhered on the heating plate, the single-crystal Si substrate is heated by thermal conduction, and a temperature difference is generated between the single-crystal Si substrate and the transparent insulating substrate. A large stress is generated between the both substrates due to rapid expansion of the single-crystal Si substrate, thus separation takes place at a hydrogen ion-implanted interface.

摘要翻译： 将具有光滑表面的加热板放置在构成加热部分的加热板上，并且加热板的光滑表面紧密地粘附在粘结到透明绝缘基板的单晶Si基板的背面上。 加热板的温度保持在200℃以上但不高于350℃。当结合到绝缘基板的单晶Si衬底的后表面紧密地粘附在加热板上时， 晶体硅衬底通过热传导加热，并且在单晶硅衬底和透明绝缘衬底之间产生温度差。 由于单晶Si衬底的快速膨胀，在两个衬底之间产生大的应力，因此在氢离子注入界面处发生分离。

公开(公告)号：US20090061557A1

公开(公告)日：2009-03-05

申请号：US12282176

申请日：2007-03-12

申请人： Shoji Akiyama ,  Yoshihiro Kubota ,  Atsuo Ito ,  Makoto Kawai ,  Yuuji Tobisaka ,  Koichi Tanaka

发明人： Shoji Akiyama ,  Yoshihiro Kubota ,  Atsuo Ito ,  Makoto Kawai ,  Yuuji Tobisaka ,  Koichi Tanaka

IPC分类号： H01L31/18

CPC分类号： H01L21/76254 ,  H01L31/0687 ,  H01L31/1804 ,  H01L31/1892 ,  Y02E10/544 ,  Y02E10/547 ,  Y02P70/521

摘要： A silicon layer having a conductivity type opposite to that of a bulk is provided on the surface of a silicon substrate and hydrogen ions are implanted to a predetermined depth into the surface region of the silicon substrate through the silicon layer to form a hydrogen ion-implanted layer. Then, an n-type germanium-based crystal layer whose conductivity type is opposite to that of the silicon layer and a p-type germanium-based crystal layer whose conductivity type is opposite to that of the germanium-based crystal layer are successively vapor-phase grown to provide a germanium-based crystal. The surface of the germanium-based crystal layer and the surface of the supporting substrate are bonded together. In this state, impact is applied externally to separate a silicon crystal from the silicon substrate along the hydrogen ion-implanted layer, thereby transferring a laminated structure composed of the germanium-based crystal and the silicon crystal onto the supporting substrate.

摘要翻译： 在硅衬底的表面上提供具有与体的导电类型相反的导电类型的硅层，并且通过硅层将氢离子注入到硅衬底的表面区域中以预定深度注入到氢离子注入 层。 然后，其导电类型与硅层的导电类型相反的n型锗基晶体层和导电类型与锗基晶体层的导电类型相反的p型锗基晶体层连续蒸发， 相生长以提供锗基晶体。 锗基晶体层的表面和支撑基板的表面接合在一起。 在这种状态下，外部施加冲击以沿着氢离子注入层从硅衬底分离硅晶体，从而将由锗基晶体和硅晶体组成的叠层结构转移到支撑衬底上。

公开(公告)号：US20080299742A1

公开(公告)日：2008-12-04

申请号：US12153519

申请日：2008-05-20

申请人： Shoji Akiyama ,  Yoshihiro Kubota ,  Atsuo Ito ,  Koichi Tanaka ,  Makoto Kawai ,  Yuuji Tobisaka

发明人： Shoji Akiyama ,  Yoshihiro Kubota ,  Atsuo Ito ,  Koichi Tanaka ,  Makoto Kawai ,  Yuuji Tobisaka

IPC分类号： H01L21/86

CPC分类号： H01L21/76254 ,  H01L21/3065 ,  H01L22/12 ,  H01L22/20 ,  H01L2924/014

摘要： There is disclosed a method for manufacturing an SOI wafer comprising: a step of implanting at least one of a hydrogen ion and a rare gas ion into a donor wafer to form an ion implanted layer; a step of bonding an ion implanted surface of the donor wafer to a handle wafer; a step of delaminating the donor wafer at the ion implanted layer to reduce a film thickness of the donor wafer, thereby providing an SOI layer; and a step of etching the SOI layer to reduce a thickness of the SOI layer, wherein the etching step includes: a stage of performing rough etching as wet etching; a stage of measuring a film thickness distribution of the SOI layer after the rough etching; and a stage of performing precise etching as dry etching based on the measured film thickness distribution of the SOI layer. There can be provided A method for manufacturing an SOI wafer having high film thickness uniformity of an SOI layer with excellent productivity.

摘要翻译： 公开了一种用于制造SOI晶片的方法，包括：将氢离子和稀有气体离子中的至少一种注入施主晶片以形成离子注入层的步骤; 将施主晶片的离子注入表面接合到处理晶片的步骤; 在离子注入层分层施主晶片以降低施主晶片的膜厚，从而提供SOI层的步骤; 以及蚀刻所述SOI层以减小所述SOI层的厚度的步骤，其中所述蚀刻步骤包括：执行粗蚀刻的阶段，如湿蚀刻; 在粗蚀刻之后测量SOI层的膜厚分布的阶段; 以及基于所测量的SOI层的膜厚分布，进行干蚀刻的精确蚀刻的阶段。 可以提供一种以优异的生产率制造具有SOI层的高膜厚均匀性的SOI晶片的方法。

公开(公告)号：US20080194078A1

公开(公告)日：2008-08-14

申请号：US12010711

申请日：2008-01-29

申请人： Shoji Akiyama ,  Yoshihiro Kubota ,  Atsuo Ito ,  Koichi Tanaka ,  Makoto Kawai ,  Yuuji Tobisaka

发明人： Shoji Akiyama ,  Yoshihiro Kubota ,  Atsuo Ito ,  Koichi Tanaka ,  Makoto Kawai ,  Yuuji Tobisaka

IPC分类号： H01L21/20

CPC分类号： H01L21/76254 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262

摘要： To obtain a semiconductor substrate having a high-quality Ge-based epitaxial film in a large area, a SiGe mixed crystal buffer layer and a Ge epitaxial film is grown on a main surface of a Si substrate 10. Although high-density defects are introduced in the Ge epitaxial film 11 from an interface between the Ge epitaxial film 11 and the Si substrate 10, the Ge epitaxial film is subjected to a heat treatment at a temperature of not less than 700° C. and not more than 900° C. to cause threading dislocations 12 to change into dislocation-loop defects 12′ near the interface between the Ge epitaxial film 11 and the Si substrate. A main surface of at least one of the Ge epitaxial film 11 with an ion implanted layer and a support substrate 20 is then subjected to a plasma treatment or ozone treatment for the purpose of surface cleaning, surface activation, and the like, after which the main surfaces of the Ge epitaxial film 11 and the support substrate 20 are appressed against and bonded to each other with their surfaces being determined as the joint surfaces. An external impact is then applied to the bonding interface, causing the Ge epitaxial film to be delaminated along a hydrogen ion implanted interface 13, thus obtaining a Ge thin film 14. A surface of the Ge thin film 14 is subsequently subjected to a final surface treatment (for example, CMP) to remove the damage caused by the hydrogen ion implantation, thus resulting in a GeOI substrate having the Ge thin film 14 on the surface thereof.

摘要翻译： 为了获得大面积地具有高质量Ge基外延膜的半导体衬底，在Si衬底10的主表面上生长SiGe混晶缓冲层和Ge外延膜。 虽然在Ge外延膜11和Si衬底10之间的界面上在Ge外延膜11中引入高密度缺陷，但Ge外延膜在不低于700℃的温度下进行热处理， 不超过900℃导致穿透位错12变为位于Ge外延膜11和Si衬底之间的界面附近的位错环缺陷12'。 为了表面清洁，表面活化等目的，对具有离子注入层的Ge外延膜11和支撑基板20中的至少一个的主表面进行等离子体处理或臭氧处理，之后， Ge外延膜11和支撑基板20的主表面以其表面被确定为接合表面而相互贴合并彼此结合。 然后对接合界面施加外部冲击，使得Ge外延膜沿着氢离子注入界面13分层，从而获得Ge薄膜14。 随后，对Ge薄膜14的表面进行最终表面处理（例如CMP），以消除由氢离子注入引起的损伤，从而得到其表面上具有Ge薄膜14的GeOI基板。

公开(公告)号：US20080119028A1

公开(公告)日：2008-05-22

申请号：US11984184

申请日：2007-11-14

申请人： Shoji Akiyama ,  Yoshihiro Kubota ,  Atsuo Ito ,  Koichi Tanaka ,  Makoto Kawai ,  Yuuji Tobisaka

发明人： Shoji Akiyama ,  Yoshihiro Kubota ,  Atsuo Ito ,  Koichi Tanaka ,  Makoto Kawai ,  Yuuji Tobisaka

IPC分类号： H01L21/30

CPC分类号： H01L21/3247 ,  H01L21/76254 ,  H01L29/78603

摘要： To lower a process temperature for an SOQ substrate manufacturing process to reduce the degree of surface roughness of an SOQ film and provide a high-quality SOQ substrate.Hydrogen ions are implanted to a surface of a single crystal Si substrate 10 through an oxide film 11 to uniformly form an ion implanted layer 12 at a predetermined depth (average ion implantation depth L) from the surface of the single crystal Si substrate 10, and a bonding surface of the substrate undergoes a plasma treatment or an ozone treatment. An external shock is applied onto the single crystal Si substrate 10 and quartz substrate 20, which are bonded together, to mechanically delaminate a silicon film 13 from a single crystal silicon bulk 14. In this way, the SOQ film 13 is formed on the quartz substrate 20 through the oxide film 11. To further smooth the SOQ film surface, hydrogen heat treatment is performed at a temperature of 1000° C. or less below a quartz glass transition point. When measuring surface roughness of an SOQ film after performing hydrogen heat treatment on a sample having surface roughness of about 5 nm in terms of RMS average value immediately after delamination, a satisfactory measurement result of 0.3 nm or less in terms of RMS average value was obtained.

摘要翻译： 为了降低SOQ基板制造工艺的工艺温度以降低SOQ膜的表面粗糙度并提供高质量的SOQ基板。 通过氧化膜11将氢离子注入到单晶Si衬底10的表面，以从单晶硅衬底10的表面以预定深度（平均离子注入深度L）均匀地形成离子注入层12，以及 基板的接合面进行等离子体处理或臭氧处理。 对结合在一起的单晶Si衬底10和石英衬底20施加外部冲击，从而将硅膜13与单晶硅体14机械地分层。这样，SOQ膜13形成在石英 基板20通过氧化膜11.为了进一步平滑SOQ膜表面，在石英玻璃化转变点以下1000℃以下的温度下进行氢热处理。 在对分层后的RMS平均值的表面粗糙度约为5nm的样品进行氢热处理后，测定SOQ膜的表面粗糙度，得到满意的平均值为0.3nm以下的测定结果 。