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    Nonvolatile semiconductor memory device
    2.
    发明授权
    Nonvolatile semiconductor memory device 失效
    非易失性半导体存储器件

    公开(公告)号：US07968933B2

    公开(公告)日：2011-06-28

    申请号：US12453928

    申请日：2009-05-27

    申请人： Shoko Kikuchi ,  Naoki Yasuda ,  Koichi Muraoka ,  Yukie Nishikawa ,  Hirotaka Nishino

    发明人： Shoko Kikuchi ,  Naoki Yasuda ,  Koichi Muraoka ,  Yukie Nishikawa ,  Hirotaka Nishino

    IPC分类号： H01L29/788

    CPC分类号： H01L21/28202 ,  H01L21/2807 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/518

    摘要： A nonvolatile semiconductor memory device includes a tunnel insulating film, a floating gate electrode, an inter-electrode insulating film, and a control gate electrode. The tunnel insulating film is formed on a selected part of a surface of a semiconductor substrate. The floating gate electrode is formed on the tunnel insulating film. At least that interface region of the floating gate electrode, which is opposite to the substrate, is made of n-type Si or metal-based conductive material. The inter-electrode insulating film is formed on the floating gate electrode and made of high-permittivity material. The control gate electrode is formed on the inter-electrode insulating film. At least that interface region of the control gate electrode, which is on the side of the inter-electrode insulating film, is made of a p-type semiconductor layer containing at least one of Si and Ge.

    摘要翻译： 非易失性半导体存储器件包括隧道绝缘膜，浮栅电极，电极间绝缘膜和控制栅电极。 隧道绝缘膜形成在半导体衬底的表面的选定部分上。 浮栅电极形成在隧道绝缘膜上。 至少与衬底相对的浮栅电极的界面区域由n型Si或金属基导电材料制成。 电极间绝缘膜形成在浮栅上并由高介电常数材料制成。 控制栅电极形成在电极间绝缘膜上。 至少所述控制栅电极的位于所述电极间绝缘膜一侧的界面区域由包含Si和Ge中的至少一种的p型半导体层构成。

    Nonvolatile semiconductor memory device
    3.
    发明授权
    Nonvolatile semiconductor memory device 失效
    非易失性半导体存储器件

    公开(公告)号：US07550801B2

    公开(公告)日：2009-06-23

    申请号：US11433422

    申请日：2006-05-15

    申请人： Shoko Kikuchi ,  Naoki Yasuda ,  Koichi Muraoka ,  Yukie Nishikawa ,  Hirotaka Nishino

    发明人： Shoko Kikuchi ,  Naoki Yasuda ,  Koichi Muraoka ,  Yukie Nishikawa ,  Hirotaka Nishino

    IPC分类号： H01L29/788

    CPC分类号： H01L21/28202 ,  H01L21/2807 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/518

    摘要： A nonvolatile semiconductor memory device includes a tunnel insulating film, a floating gate electrode, an inter-electrode insulating film, and a control gate electrode. The tunnel insulating film is formed on a selected part of a surface of a semiconductor substrate. The floating gate electrode is formed on the tunnel insulating film. At least that interface region of the floating gate electrode, which is opposite to the substrate, is made of n-type Si or metal-based conductive material. The inter-electrode insulating film is formed on the floating gate electrode and made of high-permittivity material. The control gate electrode is formed on the inter-electrode insulating film. At least that interface region of the control gate electrode, which is on the side of the inter-electrode insulating film, is made of a p-type semiconductor layer containing at least one of Si and Ge.

    摘要翻译： 非易失性半导体存储器件包括隧道绝缘膜，浮栅电极，电极间绝缘膜和控制栅电极。 隧道绝缘膜形成在半导体衬底的表面的选定部分上。 浮栅电极形成在隧道绝缘膜上。 至少与衬底相对的浮栅电极的界面区域由n型Si或金属基导电材料制成。 电极间绝缘膜形成在浮栅上并由高介电常数材料制成。 控制栅电极形成在电极间绝缘膜上。 至少所述控制栅电极的位于所述电极间绝缘膜一侧的界面区域由包含Si和Ge中的至少一种的p型半导体层构成。

    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
    4.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 审中-公开
    非易失性半导体存储器件

    公开(公告)号：US20070284646A1

    公开(公告)日：2007-12-13

    申请号：US11690401

    申请日：2007-03-23

    申请人： Shoko Kikuchi ,  Naoki Yasuda ,  Koichi Muraoka ,  Yukie Nishikawa ,  Hirotaka Nishino

    发明人： Shoko Kikuchi ,  Naoki Yasuda ,  Koichi Muraoka ,  Yukie Nishikawa ,  Hirotaka Nishino

    IPC分类号： H01L29/788

    CPC分类号： H01L29/792 ,  G11C16/0466 ,  H01L29/40117 ,  H01L29/4234 ,  H01L29/517 ,  H01L29/66833

    摘要： According to an aspect of the invention, a nonvolatile semiconductor memory device includes: a semiconductor layer comprising an n-type semiconductor region; p-type source-drain regions separated from each other within the n-type semiconductor region; a charge storage layer provided on the semiconductor layer and between the p-type source-drain regions, the charge storage layer comprising a high dielectric constant material; and a control gate electrode provided on the charge storage layer and comprising a material selected from n-type Si, a metal-based conductive material, and a p-type semiconductor material including at least one of Si and Ge.

    摘要翻译： 根据本发明的一个方面，非易失性半导体存储器件包括：包括n型半导体区域的半导体层; 在n型半导体区域内彼此分离的p型源极 - 漏极区域; 电荷存储层，其设置在所述半导体层上，并且在所述p型源极 - 漏极区域之间，所述电荷存储层包括高介电常数材料; 以及设置在电荷存储层上并包括选自n型Si，金属基导电材料和包括Si和Ge中的至少一种的p型半导体材料的材料的控制栅电极。

    Nonvolatile semiconductor memory device
    5.
    发明申请
    Nonvolatile semiconductor memory device 失效
    非易失性半导体存储器件

    公开(公告)号：US20070042547A1

    公开(公告)日：2007-02-22

    申请号：US11433422

    申请日：2006-05-15

    申请人： Shoko Kikuchi ,  Naoki Yasuda ,  Koichi Muraoka ,  Yukie Nishikawa ,  Hirotaka Nishino

    发明人： Shoko Kikuchi ,  Naoki Yasuda ,  Koichi Muraoka ,  Yukie Nishikawa ,  Hirotaka Nishino

    IPC分类号： H01L21/336

    CPC分类号： H01L21/28202 ,  H01L21/2807 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/518

    摘要： A nonvolatile semiconductor memory device includes a tunnel insulating film, a floating gate electrode, an inter-electrode insulating film, and a control gate electrode. The tunnel insulating film is formed on a selected part of a surface of a semiconductor substrate. The floating gate electrode is formed on the tunnel insulating film. At least that interface region of the floating gate electrode, which is opposite to the substrate, is made of n-type Si or metal-based conductive material. The inter-electrode insulating film is formed on the floating gate electrode and made of high-permittivity material. The control gate electrode is formed on the inter-electrode insulating film. At least that interface region of the control gate electrode, which is on the side of the inter-electrode insulating film, is made of a p-type semiconductor layer containing at least one of Si and Ge.

    摘要翻译： 非易失性半导体存储器件包括隧道绝缘膜，浮栅电极，电极间绝缘膜和控制栅电极。 隧道绝缘膜形成在半导体衬底的表面的选定部分上。 浮栅电极形成在隧道绝缘膜上。 至少与衬底相对的浮栅电极的界面区域由n型Si或金属基导电材料制成。 电极间绝缘膜形成在浮栅上并由高介电常数材料制成。 控制栅电极形成在电极间绝缘膜上。 至少所述控制栅电极的位于所述电极间绝缘膜一侧的界面区域由包含Si和Ge中的至少一种的p型半导体层构成。

    Nonvolatile semiconductor memory device
    6.
    发明授权
    Nonvolatile semiconductor memory device 有权
    非易失性半导体存储器件

    公开(公告)号：US07560767B2

    公开(公告)日：2009-07-14

    申请号：US11548914

    申请日：2006-10-12

    申请人： Naoki Yasuda ,  Yukie Nishikawa ,  Koichi Muraoka

    发明人： Naoki Yasuda ,  Yukie Nishikawa ,  Koichi Muraoka

    IPC分类号： H01L29/423 ,  H01L29/788

    CPC分类号： H01L29/42324 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/4234 ,  H01L29/513 ,  H01L29/7881 ,  H01L29/792

    摘要： A nonvolatile semiconductor memory device according to an example of the present invention includes source/drain diffusion layers, a first insulation film on a channel between the source/drain diffusion layers, a floating gate electrode on the first insulation film and composed of first electrically conductive layers, a second insulation film on the floating gate electrode, and a control gate electrode on the second insulation film. In the case where one first electrically conductive layer excluding a top layer is defined as a reference layer among first electrically conductive layers, a work function of the reference layer is 4.0 eV or more and work functions of the reference layer and of the first electrically conductive layers above the reference layer gradually increase as the layers are proximal to the second insulation film.

    摘要翻译： 根据本发明实施例的非易失性半导体存储器件包括源极/漏极扩散层，源极/漏极扩散层之间的沟道上的第一绝缘膜，第一绝缘膜上的浮置栅电极和由第一导电 层，在浮栅电极上的第二绝缘膜，以及在第二绝缘膜上的控制栅电极。 在除了顶层之外的一个第一导电层被定义为第一导电层中的参考层的情况下，参考层的功函数为4.0eV或更大，并且参考层和第一导电层的功函数 随着层靠近第二绝缘膜，参考层之上的层逐渐增加。

    NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
    9.
    发明申请
    NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    非挥发性半导体存储器件及其制造方法

    公开(公告)号：US20120256249A1

    公开(公告)日：2012-10-11

    申请号：US13527813

    申请日：2012-06-20

    申请人： Yasushi NAKASAKI ,  Koichi Muraoka ,  Naoki Yasuda ,  Shoko Kikuchi

    发明人： Yasushi NAKASAKI ,  Koichi Muraoka ,  Naoki Yasuda ,  Shoko Kikuchi

    IPC分类号： H01L29/792

    CPC分类号： H01L29/792 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/42332 ,  H01L29/42348 ,  H01L29/513 ,  H01L29/7881

    摘要： A MONOS type non-volatile semiconductor memory device which is capable of electrically writing, erasing, reading and retaining data, the memory device including source/drain regions, a first gate insulating layer, a first charge trapping layer formed on the first gate insulating layer, a second gate insulating layer formed on the first charge trapping layer, and a controlling electrode formed on the second gate insulating layer. The first charge trapping layer includes an insulating film containing Al and O as major elements and having a defect pair formed of a complex of an interstitial O atom and a tetravalent cationic atom substituting for an Al atom, the insulating film also having electron unoccupied levels within the range of 2 eV-6 eV as measured from the valence band maximum of Al2O3.

    摘要翻译： 一种能够电写入，擦除，读取和保留数据的MONOS型非易失性半导体存储器件，所述存储器件包括源极/漏极区，第一栅极绝缘层，形成在第一栅极绝缘层上的第一电荷俘获层 形成在第一电荷俘获层上的第二栅极绝缘层，以及形成在第二栅极绝缘层上的控制电极。 第一电荷俘获层包括含有Al和O作为主要元素并且具有由间隙O原子和四价阳离子原子的复合物形成的缺陷对的绝缘膜，代替Al原子，绝缘膜还具有电子未占有的含量 从Al2O3的价带最大值测量的2eV-6eV的范围。