公开(公告)号：US09911856B2

公开(公告)日：2018-03-06

申请号：US12900145

申请日：2010-10-07

申请人： Shunpei Yamazaki ,  Akiharu Miyanaga ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Junichiro Sakata

发明人： Shunpei Yamazaki ,  Akiharu Miyanaga ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Junichiro Sakata

IPC分类号： H01L29/786 ,  H01L29/423

CPC分类号： H01L29/7869 ,  H01L29/42384 ,  H01L29/78606 ,  H01L29/78696

摘要： One of objects is to provide a semiconductor device with stable electric characteristics, in which an oxide semiconductor is used. The semiconductor device includes a thin film transistor including an oxide semiconductor layer, and a silicon oxide layer over the thin film transistor. The thin film transistor includes a gate electrode layer, a gate insulating layer whose thickness is equal to or larger than 100 nm and equal to or smaller than 350 nm, the oxide semiconductor layer, a source electrode layer and a drain electrode layer. In the thin film transistor, the difference of the threshold voltage value is 1 V or less between before and after performance of a measurement in which the voltage of 30 V or −30 V is applied to the gate electrode layer at a temperature of 85° C. for 12 hours.

公开(公告)号：US09627198B2

公开(公告)日：2017-04-18

申请号：US12894791

申请日：2010-09-30

申请人： Shunpei Yamazaki ,  Akiharu Miyanaga ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Junichiro Sakata

发明人： Shunpei Yamazaki ,  Akiharu Miyanaga ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Junichiro Sakata

IPC分类号： H01L21/00 ,  H01L21/84 ,  H01L21/02 ,  H01L29/786 ,  H01L27/12

CPC分类号： H01L21/02554 ,  G02F1/1368 ,  G02F1/167 ,  H01L21/02164 ,  H01L21/02172 ,  H01L21/02266 ,  H01L21/02422 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/477 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/3262 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

摘要： An object is to provide a semiconductor device with stable electric characteristics in which an oxide semiconductor is used. The impurity concentration in the oxide semiconductor layer is reduced in the following manner: a silicon oxide layer including many defects typified by dangling bonds is formed in contact with the oxide semiconductor layer, and an impurity such as hydrogen or moisture (a hydrogen atom or a compound including a hydrogen atom such as H2O) included in the oxide semiconductor layer is diffused into the silicon oxide layer. Further, a mixed region is provided between the oxide semiconductor layer and the silicon oxide layer. The mixed region includes oxygen, silicon, and at least one kind of metal element that is included in the oxide semiconductor.

公开(公告)号：US20110084272A1

公开(公告)日：2011-04-14

申请号：US12900136

申请日：2010-10-07

申请人： Akiharu Miyanaga ,  Junichiro Sakata ,  Masayuki Sakakura ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Shunpei Yamazaki

发明人： Akiharu Miyanaga ,  Junichiro Sakata ,  Masayuki Sakakura ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Shunpei Yamazaki

IPC分类号： H01L29/22 ,  H01L21/336

CPC分类号： H01L29/7869 ,  H01L27/1214 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/42384 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/78618

摘要： An object is to provide a thin film transistor having favorable electric characteristics and a semiconductor device including the thin film transistor as a switching element. The thin film transistor includes a gate electrode formed over an insulating surface, a gate insulating film over the gate electrode, an oxide semiconductor film which overlaps with the gate electrode over the gate insulating film and which includes a layer where the concentration of one or a plurality of metals contained in the oxide semiconductor is higher than that in other regions, a pair of metal oxide films formed over the oxide semiconductor film and in contact with the layer, and a source electrode and a drain electrode in contact with the metal oxide films. The metal oxide films are formed by oxidation of a metal contained in the source electrode and the drain electrode.

摘要翻译： 目的是提供一种具有良好电特性的薄膜晶体管和包括薄膜晶体管作为开关元件的半导体器件。 薄膜晶体管包括形成在绝缘表面上的栅极电极，栅电极上的栅极绝缘膜，与栅极绝缘膜上的栅电极重叠的氧化物半导体膜，并且包括其中浓度为1或 包含在氧化物半导体中的多种金属高于其他区域，形成在氧化物半导体膜上并与该层接触的一对金属氧化物膜，以及与金属氧化物膜接触的源电极和漏电极 。 金属氧化物膜通过氧化源电极和漏电极中所含的金属而形成。

公开(公告)号：US08766250B2

公开(公告)日：2014-07-01

申请号：US12950186

申请日：2010-11-19

申请人： Akiharu Miyanaga ,  Junichiro Sakata ,  Masayuki Sakakura ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Shunpei Yamazaki

发明人： Akiharu Miyanaga ,  Junichiro Sakata ,  Masayuki Sakakura ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Shunpei Yamazaki

IPC分类号： H01L29/10

CPC分类号： H01L29/7869 ,  H01L29/10 ,  H01L29/41733

摘要： A thin film transistor including an oxide semiconductor with favorable electrical characteristics is provided. The thin film transistor includes a gate electrode provided over a substrate, a gate insulating film provided over the gate electrode, an oxide semiconductor film provided over the gate electrode and on the gate insulating film, a metal oxide film provided on the oxide semiconductor film, and a metal film provided on the metal oxide film. The oxide semiconductor film is in contact with the metal oxide film, and includes a region whose concentration of metal is higher than that of any other region in the oxide semiconductor film (a high metal concentration region). In the high metal concentration region, the metal contained in the oxide semiconductor film may be present as a crystal grain or a microcrystal.

摘要翻译： 提供了包括具有良好电特性的氧化物半导体的薄膜晶体管。 薄膜晶体管包括设置在基板上的栅极电极，设置在栅极上的栅极绝缘膜，设置在栅电极和栅极绝缘膜上的氧化物半导体膜，设置在氧化物半导体膜上的金属氧化物膜， 以及设置在金属氧化物膜上的金属膜。 氧化物半导体膜与金属氧化物膜接触，并且包括金属的浓度高于氧化物半导体膜中的任何其它区域（高金属浓度区域）的区域。 在高金属浓度区域中，包含在氧化物半导体膜中的金属可以作为晶粒或微晶存在。

公开(公告)号：US08779418B2

公开(公告)日：2014-07-15

申请号：US12900136

申请日：2010-10-07

申请人： Akiharu Miyanaga ,  Junichiro Sakata ,  Masayuki Sakakura ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Shunpei Yamazaki

发明人： Akiharu Miyanaga ,  Junichiro Sakata ,  Masayuki Sakakura ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Shunpei Yamazaki

IPC分类号： H01L29/12

CPC分类号： H01L29/7869 ,  H01L27/1214 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/42384 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/78618

摘要： An object is to provide a thin film transistor having favorable electric characteristics and a semiconductor device including the thin film transistor as a switching element. The thin film transistor includes a gate electrode formed over an insulating surface, a gate insulating film over the gate electrode, an oxide semiconductor film which overlaps with the gate electrode over the gate insulating film and which includes a layer where the concentration of one or a plurality of metals contained in the oxide semiconductor is higher than that in other regions, a pair of metal oxide films formed over the oxide semiconductor film and in contact with the layer, and a source electrode and a drain electrode in contact with the metal oxide films. The metal oxide films are formed by oxidation of a metal contained in the source electrode and the drain electrode.

摘要翻译： 目的是提供一种具有良好电特性的薄膜晶体管和包括薄膜晶体管作为开关元件的半导体器件。 薄膜晶体管包括形成在绝缘表面上的栅极电极，栅电极上的栅极绝缘膜，与栅极绝缘膜上的栅电极重叠的氧化物半导体膜，并且包括其中浓度为1或 包含在氧化物半导体中的多种金属高于其他区域，形成在氧化物半导体膜上并与该层接触的一对金属氧化物膜，以及与金属氧化物膜接触的源电极和漏电极 。 金属氧化物膜通过氧化源电极和漏电极中所含的金属而形成。

公开(公告)号：US20110084273A1

公开(公告)日：2011-04-14

申请号：US12900145

申请日：2010-10-07

申请人： Shunpei Yamazaki ,  Akiharu Miyanaga ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Junichiro Sakata

发明人： Shunpei Yamazaki ,  Akiharu Miyanaga ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Junichiro Sakata

IPC分类号： H01L29/786

CPC分类号： H01L29/7869 ,  H01L29/42384 ,  H01L29/78606 ,  H01L29/78696

摘要： One of objects is to provide a semiconductor device with stable electric characteristics, in which an oxide semiconductor is used. The semiconductor device includes a thin film transistor including an oxide semiconductor layer, and a silicon oxide layer over the thin film transistor. The thin film transistor includes a gate electrode layer, a gate insulating layer whose thickness is equal to or larger than 100 nm and equal to or smaller than 350 nm, the oxide semiconductor layer, a source electrode layer and a drain electrode layer. In the thin film transistor, the difference of the threshold voltage value is 1 V or less between before and after performance of a measurement in which the voltage of 30 V or −30 V is applied to the gate electrode layer at a temperature of 85° C. for 12 hours.

摘要翻译： 其目的之一是提供具有稳定电特性的半导体器件，其中使用氧化物半导体。 该半导体器件包括薄膜晶体管，该薄膜晶体管包括氧化物半导体层，以及位于薄膜晶体管上的氧化硅层。 薄膜晶体管包括栅极电极层，厚度等于或大于100nm且等于或小于350nm的栅极绝缘层，氧化物半导体层，源极电极层和漏极电极层。 在薄膜晶体管中，在将温度为85°的栅极电极层施加30V或-30V的电压的测量之前和之后，阈值电压值的差为1V以下 C.持续12小时。

公开(公告)号：US20110084266A1

公开(公告)日：2011-04-14

申请号：US12897419

申请日：2010-10-04

申请人： Shunpei Yamazaki ,  Masayuki Sakakura ,  Ryosuke Watanabe ,  Junichiro Sakata ,  Kengo Akimoto ,  Akiharu Miyanaga ,  Takuya Hirohashi ,  Hideyuki Kishida

发明人： Shunpei Yamazaki ,  Masayuki Sakakura ,  Ryosuke Watanabe ,  Junichiro Sakata ,  Kengo Akimoto ,  Akiharu Miyanaga ,  Takuya Hirohashi ,  Hideyuki Kishida

IPC分类号： H01L29/12

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/45 ,  H01L29/78606 ,  H01L29/78696

摘要： In a channel protected thin film transistor in which a channel formation region is formed using an oxide semiconductor, an oxide semiconductor layer which is dehydrated or dehydrogenated by a heat treatment is used as an active layer, a crystal region including nanocrystals is included in a superficial portion in the channel formation region, and the rest portion is amorphous or is formed of a mixture of amorphousness/non-crystals and microcrystals, where an amorphous region is dotted with microcrystals. By using an oxide semiconductor layer having such a structure, a change to an n-type caused by entry of moisture or elimination of oxygen to or from the superficial portion and generation of a parasitic channel can be prevented and a contact resistance with a source and drain electrodes can be reduced.

摘要翻译： 在使用氧化物半导体形成沟道形成区域的沟道保护薄膜晶体管中，使用通过热处理脱水或脱氢的氧化物半导体层作为有源层，包括纳米晶体的晶体区域包含在表面 并且其余部分是无定形的或由非晶/非晶体和微晶体的混合物形成，其中非晶区域用微晶点缀。 通过使用具有这种结构的氧化物半导体层，可以防止由于进入水分或从表面部分去除氧气或从表面部分排出而引起的n型变化和产生寄生通道，并且与源极接触电阻 可以减少漏电极。

公开(公告)号：US08492758B2

公开(公告)日：2013-07-23

申请号：US12887646

申请日：2010-09-22

申请人： Shunpei Yamazaki ,  Masayuki Sakakura ,  Ryosuke Watanabe ,  Junichiro Sakata ,  Kengo Akimoto ,  Akiharu Miyanaga ,  Takuya Hirohashi ,  Hideyuki Kishida

发明人： Shunpei Yamazaki ,  Masayuki Sakakura ,  Ryosuke Watanabe ,  Junichiro Sakata ,  Kengo Akimoto ,  Akiharu Miyanaga ,  Takuya Hirohashi ,  Hideyuki Kishida

IPC分类号： H01L29/12

CPC分类号： H01L29/78696 ,  H01L21/2636 ,  H01L27/1225 ,  H01L29/04 ,  H01L29/045 ,  H01L29/12 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/7869

摘要： It is an object to provide a highly reliable semiconductor device with good electrical characteristics and a display device including the semiconductor device as a switching element. In a transistor including an oxide semiconductor layer, a needle crystal group provided on at least one surface side of the oxide semiconductor layer grows in a c-axis direction perpendicular to the surface and includes an a-b plane parallel to the surface, and a portion except for the needle crystal group is an amorphous region or a region in which amorphousness and microcrystals are mixed. Accordingly, a highly reliable semiconductor device with good electrical characteristics can be formed.

公开(公告)号：US09935202B2

公开(公告)日：2018-04-03

申请号：US13528009

申请日：2012-06-20

申请人： Shunpei Yamazaki ,  Masayuki Sakakura ,  Ryosuke Watanabe ,  Junichiro Sakata ,  Kengo Akimoto ,  Akiharu Miyanaga ,  Takuya Hirohashi ,  Hideyuki Kishida

发明人： Shunpei Yamazaki ,  Masayuki Sakakura ,  Ryosuke Watanabe ,  Junichiro Sakata ,  Kengo Akimoto ,  Akiharu Miyanaga ,  Takuya Hirohashi ,  Hideyuki Kishida

IPC分类号： H01L29/10 ,  H01L29/786 ,  H01L27/12 ,  H01L29/04

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/04 ,  H01L29/045 ,  H01L29/78618 ,  H01L29/78693 ,  H01L29/78696

摘要： To provide a transistor having a favorable electric characteristics and high reliability and a display device including the transistor. The transistor is a bottom-gate transistor formed using an oxide semiconductor for a channel region. An oxide semiconductor layer subjected to dehydration or dehydrogenation through heat treatment is used as an active layer. The active layer includes a first region of a superficial portion microcrystallized and a second region of the rest portion. By using the oxide semiconductor layer having such a structure, a change to an n-type, which is attributed to entry of moisture to the superficial portion or elimination of oxygen from the superficial portion, and generation of a parasitic channel can be suppressed. In addition, contact resistance between the oxide semiconductor layer and source and drain electrodes can be reduced.

公开(公告)号：US08309961B2

公开(公告)日：2012-11-13

申请号：US12897419

申请日：2010-10-04

申请人： Shunpei Yamazaki ,  Masayuki Sakakura ,  Ryosuke Watanabe ,  Junichiro Sakata ,  Kengo Akimoto ,  Akiharu Miyanaga ,  Takuya Hirohashi ,  Hideyuki Kishida

发明人： Shunpei Yamazaki ,  Masayuki Sakakura ,  Ryosuke Watanabe ,  Junichiro Sakata ,  Kengo Akimoto ,  Akiharu Miyanaga ,  Takuya Hirohashi ,  Hideyuki Kishida

IPC分类号： H01L29/04

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/45 ,  H01L29/78606 ,  H01L29/78696

摘要： In a channel protected thin film transistor in which a channel formation region is formed using an oxide semiconductor, an oxide semiconductor layer which is dehydrated or dehydrogenated by a heat treatment is used as an active layer, a crystal region including nanocrystals is included in a superficial portion in the channel formation region, and the rest portion is amorphous or is formed of a mixture of amorphousness/non-crystals and microcrystals, where an amorphous region is dotted with microcrystals. By using an oxide semiconductor layer having such a structure, a change to an n-type caused by entry of moisture or elimination of oxygen to or from the superficial portion and generation of a parasitic channel can be prevented and a contact resistance with a source and drain electrodes can be reduced.

摘要翻译： 在使用氧化物半导体形成沟道形成区域的沟道保护薄膜晶体管中，使用通过热处理脱水或脱氢的氧化物半导体层作为有源层，包括纳米晶体的晶体区域包含在表面 并且其余部分是无定形的或由非晶/非晶体和微晶体的混合物形成，其中非晶区域用微晶点缀。 通过使用具有这种结构的氧化物半导体层，可以防止由于进入水分或从表面部分去除氧气或从表面部分排出而引起的n型变化和产生寄生通道，并且与源极接触电阻 可以减少漏电极。