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公开(公告)号:US20180205388A1
公开(公告)日:2018-07-19
申请号:US15921337
申请日:2018-03-14
Applicant: Socionext Inc.
Inventor: Kenta Aruga , Yasuhiro Mizuno , Masato Yoshioka
IPC: H03M1/06
CPC classification number: H03M1/0678 , H03M1/069 , H03M1/38 , H03M1/46 , H03M1/462 , H03M1/68 , H03M1/765 , H03M1/804 , H04N5/4401 , H04N5/50
Abstract: An A/D converter includes a capacitor DAC, a resistor DAC, a first capacitive element, and a comparator. The capacitor DAC is configured to convert high-order M bits, where M and N are integers equal to or greater than 2, and the resistor DAC is configured to convert low-order N bits. The first capacitive element is provided between the capacitor DAC and the resistor DAC, and the comparator is configured to compare an input signal voltage with a voltage output from the capacitor DAC. The resistor DAC generates and outputs a voltage by adding or subtracting a wait based on redundant bits in addition to N-bit resolution.
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公开(公告)号:US10164651B2
公开(公告)日:2018-12-25
申请号:US15921337
申请日:2018-03-14
Applicant: SOCIONEXT INC.
Inventor: Kenta Aruga , Yasuhiro Mizuno , Masato Yoshioka
Abstract: An A/D converter includes a capacitor DAC, a resistor DAC, a first capacitive element, and a comparator. The capacitor DAC is configured to convert high-order M bits, where M and N are integers equal to or greater than 2, and the resistor DAC is configured to convert low-order N bits. The first capacitive element is provided between the capacitor DAC and the resistor DAC, and the comparator is configured to compare an input signal voltage with a voltage output from the capacitor DAC. The resistor DAC generates and outputs a voltage by adding or subtracting a wait based on redundant bits in addition to N-bit resolution.
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