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    SONOS memory device using an amorphous memory node material
    8.
    发明授权
    SONOS memory device using an amorphous memory node material 有权
    SONOS存储器件使用非晶体存储器节点材料

    公开(公告)号：US08217445B2

    公开(公告)日：2012-07-10

    申请号：US10864499

    申请日：2004-06-10

    申请人： Sang-hun Jeon ,  Soo-doo Chae ,  Ju-hyung Kim ,  Chung-woo Kim

    发明人： Sang-hun Jeon ,  Soo-doo Chae ,  Ju-hyung Kim ,  Chung-woo Kim

    IPC分类号： H01L29/792

    CPC分类号： H01L21/28282

    摘要： A SONOS memory device, and a method of manufacturing the same, includes a substrate and a multifunctional device formed on the substrate. The multifunctional device performs both switching and data storing functions. The multifunctional device includes first and second impurities areas, a channel formed between the first and second impurities areas, and a stacked material formed on the channel for data storage. The stacked material for data storage is formed by sequentially stacking a tunneling oxide layer, a memory node layer in which data is stored, a blocking layer, and an electrode layer.

    摘要翻译： SONOS存储器件及其制造方法包括形成在衬底上的衬底和多功能器件。 多功能设备执行切换和数据存储功能。 多功能装置包括第一和第二杂质区域，形成在第一和第二杂质区域之间的通道，以及形成在通道上用于数据存储的堆叠材料。 用于数据存储的层叠材料通过依次层叠隧道氧化物层，存储数据的存储节点层，阻挡层和电极层而形成。

    SONOS memory device having nano-sized trap elements
    9.
    发明申请
    SONOS memory device having nano-sized trap elements 有权
    具有纳米级陷阱元件的SONOS存储器件

    公开(公告)号：US20070267688A1

    公开(公告)日：2007-11-22

    申请号：US11878277

    申请日：2007-07-23

    申请人： Ju-hyung Kim ,  Chung-woo Kim ,  Soo-doo Chae ,  Youn-seok Jeong

    发明人： Ju-hyung Kim ,  Chung-woo Kim ,  Soo-doo Chae ,  Youn-seok Jeong

    IPC分类号： H01L29/788

    CPC分类号： H01L21/28282 ,  B82Y10/00 ,  H01L21/28273 ,  H01L29/42332 ,  H01L29/513 ,  H01L29/518 ,  H01L29/7887

    摘要： A silicon-oxide-nitride-oxide-silicon (SONOS) memory device includes a memory type transistor including a gate with a SONOS structure on a semiconductor substrate. The gate is formed by sequentially stacking a tunneling oxide layer, a memory node structure including a trap site having nano-sized trap elements in which charges passing through the tunneling oxide layer are trapped, and a gate electrode. The nano-sized trap elements may be a crystal layer composed of nanocrystals that are separated from one another to trap the charges. The memory node structure may include additional memory node layers which are isolated from the nano-sized trap elements.

    摘要翻译： 氧化硅 - 氧化物 - 氧化物 - 硅（SONOS）存储器件包括在半导体衬底上包括具有SONOS结构的栅极的存储器型晶体管。 栅极通过依次层叠隧道氧化物层，存储器结构结构，其包括具有纳米级陷阱元件的陷阱位置，其中通过隧道氧化物层的电荷被捕获，以及栅极电极。 纳米尺寸的阱元件可以是由彼此分离以捕获电荷的纳米晶体组成的晶体层。 存储器节点结构可以包括与纳米级陷阱元件隔离的附加存储器节点层。

    Method of operating a SONOS memory device
    10.
    发明授权
    Method of operating a SONOS memory device 有权
    操作SONOS存储器件的方法

    公开(公告)号：US07825459B2

    公开(公告)日：2010-11-02

    申请号：US12453147

    申请日：2009-04-30

    申请人： Ju-hyung Kim ,  Chung-woo Kim ,  Soo-doo Chae ,  Youn-seok Jeong

    发明人： Ju-hyung Kim ,  Chung-woo Kim ,  Soo-doo Chae ,  Youn-seok Jeong

    IPC分类号： H01L29/792 ,  H01L21/336

    CPC分类号： H01L21/28282 ,  B82Y10/00 ,  H01L21/28273 ,  H01L29/42332 ,  H01L29/513 ,  H01L29/518 ,  H01L29/7887

    摘要： A silicon-oxide-nitride-oxide-silicon (SONOS) memory device includes a memory type transistor including a gate with a SONOS structure on a semiconductor substrate. The gate is formed by sequentially stacking a tunneling oxide layer, a memory node structure including a trap site having nano-sized trap elements in which charges passing through the tunneling oxide layer are trapped, and a gate electrode. The nano-sized trap elements may be a crystal layer composed of nanocrystals that are separated from one another to trap the charges. The memory node structure may include additional memory node layers which are isolated from the nano-sized trap elements.

    摘要翻译： 氧化硅 - 氧化物 - 氧化物 - 硅（SONOS）存储器件包括在半导体衬底上包括具有SONOS结构的栅极的存储器型晶体管。 栅极通过依次层叠隧道氧化物层，存储器结构结构，其包括具有纳米级陷阱元件的陷阱位置，其中通过隧道氧化物层的电荷被捕获，以及栅极电极。 纳米尺寸的阱元件可以是由彼此分离以捕获电荷的纳米晶体组成的晶体层。 存储器节点结构可以包括与纳米级陷阱元件隔离的附加存储器节点层。