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公开(公告)号：US20110109489A1
公开(公告)日：2011-05-12
申请号：US12615994
申请日：2009-11-10
摘要： Exemplary implementations of electrical circuits and systems are disclosed, and methods for signal processing including sampling and quantizing of amplitude and band limited signals implemented through a Passive Pulse Modulation Analog to Digital Converter (PMADC).
摘要翻译： 公开了电路和系统的示例性实现方式，以及用于信号处理的方法，包括通过无源脉冲调制模数转换器（PMADC）实现的振幅和频带限制信号的采样和量化。
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公开(公告)号：US20110279296A1
公开(公告)日：2011-11-17
申请号：US13187975
申请日：2011-07-21
IPC分类号： H03M1/12
摘要： Exemplary implementations of electrical circuits and systems are disclosed, and methods for signal processing including sampling and quantizing of amplitude and band limited signals implemented through a Passive Pulse Modulation Analog to Digital Converter (PMADC).
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公开(公告)号：US08018366B2
公开(公告)日：2011-09-13
申请号：US12615994
申请日：2009-11-10
IPC分类号： H03M1/12
摘要： Exemplary implementations of electrical circuits and systems are disclosed, and methods for signal processing including sampling and quantizing of amplitude and band limited signals implemented through a Passive Pulse Modulation Analog to Digital Converter (PMADC).
摘要翻译： 公开了电路和系统的示例性实施方式，以及用于信号处理的方法，包括通过无源脉冲调制模数转换器（PMADC）实现的振幅和频带限制信号的采样和量化。
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公开(公告)号：US08830104B2
公开(公告)日：2014-09-09
申请号：US13187975
申请日：2011-07-21
IPC分类号： H03M1/12
摘要： Exemplary implementations of electrical circuits and systems are disclosed, and methods for signal processing including sampling and quantizing of amplitude and band limited signals implemented through a Passive Pulse Modulation Analog to Digital Converter (PMADC).
摘要翻译： 公开了电路和系统的示例性实施方式，以及用于信号处理的方法，包括通过无源脉冲调制模数转换器（PMADC）实现的振幅和频带限制信号的采样和量化。
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公开(公告)号：US07339987B2
公开(公告)日：2008-03-04
申请号：US10484959
申请日：2002-07-24
申请人： Lajos Gazsi , Matthias Schoebinger
发明人： Lajos Gazsi , Matthias Schoebinger
IPC分类号： H03H7/30
CPC分类号： H04L25/03057 , H04L2025/03547 , H04L2025/03617
摘要： The invention relates to a device for correcting a receiver signal which is associated with an emission signal transmitted in a distorted transmission system. The emission signal comprises periods which can be determined by analyzing the received signal wherein determined properties are exhibited which are suitable for adjusting the correction. According to one embodiment, the device comprises a component for adjusting the correction based upon an analysis of the received signal and a component for monitoring and enabling the adjusting component when the received signal associated with the transmission signal exhibits certain characteristics.
摘要翻译： 本发明涉及一种用于校正与在失真传输系统中传输的发射信号有关的接收机信号的装置。 发射信号包括可以通过分析所接收的信号来确定其周期，其中显示适合于调整校正的确定的特性。 根据一个实施例，该装置包括用于基于对接收信号的分析来调整校正的组件和用于在与传输信号相关联的接收信号表现出某些特性时监视和启用调整组件的组件。
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6.发明授权Heterogeneous parallel multithread processor (HPMT) with local context memory sets for respective processor type groups and global context memory 有权具有本地上下文存储器的异构并行多线程处理器（HPMT），用于各自的处理器类型组和全局上下文存储器公开(公告)号：US07263604B2
公开(公告)日：2007-08-28
申请号：US11064795
申请日：2005-02-24
申请人： Lajos Gazsi , Jinan Lin , Soenke Mehrgardt , Xiaoning Nie
发明人： Lajos Gazsi , Jinan Lin , Soenke Mehrgardt , Xiaoning Nie
IPC分类号： G06F9/46
CPC分类号： G06F9/3851 , G06F9/3012 , G06F9/30123 , G06F9/3802 , G06F9/3891
摘要： The invention relates to a heterogeneous parallel multithread processor (1) with shared contexts which has a plurality (M) of parallel-connected standard processor root unit types (2p; p∈ [1, . . . , M]), where each respective standard processor root unit type (2p) has at least one or more (K) parallel-connected standard processor root units (2pq; q∈ [1, . . . , K]) for instruction execution of program instructions from various threads (T), each standard processor root unit type (2p) having N local context memories (32pt) which each buffer-store part of a current processor state for a thread. The multithread processor (1) also has a plurality (N) of global context memories (3t; t∈ [1, . . . , N]) which each buffer-store part of a current processor state for a thread, and a thread control unit (4) which can connect any standard processor root unit (2pq) to any global context memory (3t).
摘要翻译： 本发明涉及一种具有共享上下文的异构并行多线程处理器（1），其具有多个（M）并行连接的标准处理器根单元类型（2），P∈[1，...， ，M]），其中每个相应的标准处理器根单元类型（2P）具有至少一个或多个（K个）并行连接的标准处理器根单位（2个pq < ;q∈[1，...，K]），用于从各种线程（T）执行程序指令的指令，具有N个本地上下文存储器的每个标准处理器根单元类型（2
每个缓冲存储一个线程的当前处理器状态的一部分。 多线程处理器（1）还具有多个（N）个全局上下文存储器（3），其中每个缓冲器存储当前处理器的一部分（例如，T∈[1，...，N]） 线程控制单元（4），其可以将任何标准处理器根单元（2＆gt; pq）连接到任何全局上下文存储器（3T）。
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7.发明授权Method of reconstructing data transmitted over a transmission path in a receiver and corresponding device 有权在接收机和对应设备中通过传输路径重传数据的方法公开(公告)号：US07095803B2
公开(公告)日：2006-08-22
申请号：US10225637
申请日：2002-08-22
申请人： Lajos Gazsi , Peter Gregorius
发明人： Lajos Gazsi , Peter Gregorius
IPC分类号： H04L27/22
摘要： To reconstruct data transmitted over a transmission path, for example a cable, the corresponding signal received by the receiver is firstly amplified and subsequently made discrete by means of an A/D-converter (6), in order to obtain a suitable digital signal, whereby the signal amplified for this purpose is scanned with a relatively low sampling rate, which can frequently lie in the Nyquist range or can be even less than the Nyquist frequency. Subsequently the signal made discrete in this way is filtered by means of a digital high pass filter (8) and equalized by means of a digital cable approximation filter (9) to compensate any distortion occurring during the transmission over the transmission path. By means of a phase locked loop (14, 18) a regenerated clock (CLK) and synchronous with this clock the originally transmitted data (DATA) is recovered from the digital signal processed in this way.
摘要翻译： 为了重建通过传输路径（例如电缆）传输的数据，接收机接收的相应信号首先被放大并随后通过A / D转换器（6）离散，以获得合适的数字信号， 由此为了这个目的而放大的信号以相对较低的采样速率被扫描，其可以频繁地位于奈奎斯特（Nyquist）范围内，或者甚至可以小于奈奎斯特（Nyquist）频率。 随后，以这种方式离散的信号通过数字高通滤波器（8）进行滤波，并通过数字电缆近似滤波器（9）进行均衡，以补偿在传输路径上传输期间发生的任何失真。 通过锁相环（14,18）再生时钟（CLK）并与该时钟同步，原始传输的数据（DATA）从以这种方式处理的数字信号中恢复。
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公开(公告)号：US20050090203A1
公开(公告)日：2005-04-28
申请号：US10916776
申请日：2004-08-12
申请人： Jorg Bonhaus , Thomas Duda , Lajos Gazsi , Peter Gregorius
发明人： Jorg Bonhaus , Thomas Duda , Lajos Gazsi , Peter Gregorius
CPC分类号： H04L27/368
摘要： A device for the production of standard compliant signals, for example pulse-type signals in a telecommunication network, serves the production and adaptation and/or pre-distortion of signals with a certain signal form, which is defined dependent on a standard signal form specified in a standard. The device comprises signal generation means (10) for the production of the signals with a certain signal form and signal adjustment means (20) for the adaptation or pre-distortion of the signals. The signal generation means (10) according to the invention are digitally realized, by using a programmable shift register (14), which contains multipliers specified by the standard signal form for multiplication with a digital input signal (1). The signal adjustment means (20) comprise substantially scalable digital filter arrangements in the form of a serial connection of digital filters (22) with a downstream multiplexer (24). Moreover, the invention provides attenuating means (50) for attenuation of the signal dependent on the characteristics of the telecommunication channel.
摘要翻译： 用于生产标准兼容信号（例如电信网络中的脉冲型信号）的装置用于以特定信号形式产生和适应和/或预失真信号，该特定信号形式取决于指定的标准信号形式 在一个标准。 该装置包括用于产生具有特定信号形式的信号的信号产生装置（10）和用于信号的自适应或预失真的信号调节装置（20）。 根据本发明的信号产生装置（10）通过使用可编程移位寄存器（14）进行数字实现，该可编程移位寄存器（14）包含用于与数字输入信号（1）相乘的标准信号形式指定的乘法器。 信号调节装置（20）包括数字滤波器（22）与下游多路复用器（24）的串行连接形式的基本上可伸缩的数字滤波器装置。 此外，本发明提供衰减装置（50），用于根据电信信道的特性衰减信号。
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公开(公告)号：US5175763A
公开(公告)日：1992-12-29
申请号：US676197
申请日：1991-03-27
申请人： Lajos Gazsi
发明人： Lajos Gazsi
CPC分类号： H04B1/586
摘要： A communication system has a two-wire communications path carrying analog transmission and reception signals, and a four-wire communications path including a two-wire transmission path carrying digital transmission signals and a two-wire reception path carrying digital reception signals. A two-wire/four-wire converter for coupling the two-wire communications path to the four-wire communications path includes an analog/digital converter having an input coupled to the two-wire communications path and an output. A digital filter has an adjustable communications function for generating a predetermined terminating impedance for the two-wire transmission path. The digital filter has an input connected to the output of the analog/digital converter and an output connected to the two-wire reception path. An adder has one input connected to the two-wire reception path, another input connected to the two-wire transmission path and an output. A subtractor has one input connected to the output of the adder, another input coupled to the output of the analog/digital converter and an output. A digital/analog converter has an input coupled to the output of the substractor and an output coupled to the two-wire communications path. A resistor is connected in parallel with the input of the analog/digital converter.
摘要翻译： 通信系统具有承载模拟发送和接收信号的双线通信路径，以及包含承载数字传输信号的双线传输路径和承载数字接收信号的二线接收路径的四线通信路径。 用于将双线通信路径耦合到四线通信路径的双线/四线转换器包括具有耦合到两线通信路径的输入和输出的模数转换器。 数字滤波器具有可调整的通信功能，用于为双线传输路径产生预定的终端阻抗。 数字滤波器具有连接到模拟/数字转换器的输出的输入和连接到两线接收路径的输出。 一个加法器有一个输入连接到两线接收路径，另一个输入连接到两线传输路径和一个输出。 减法器具有连接到加法器的输出的一个输入端，耦合到模拟/数字转换器的输出端的另一输入端和输出端。 数字/模拟转换器具有耦合到减法器的输出的输入端和耦合到双线通信路径的输出。 一个电阻与模拟/数字转换器的输入端并联连接。
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10.发明授权Method and circuit configuration for avoiding overflows in an adaptive, recursive digital wave filter having fixed point arithmetic 失效在具有固定点算术性能的自适应数字波形滤波器中避免过流的方法和电路配置
公开(公告)号：US5138568A
公开(公告)日：1992-08-11
申请号：US532435
申请日：1990-06-04
申请人： Lajos Gazsi , Dieter Bruckmann
发明人： Lajos Gazsi , Dieter Bruckmann
IPC分类号： H03H17/02
CPC分类号： H03H17/0201
摘要： An adaptive, recursive digital wave filter includes a transfer filter and a gradient filter each having a respective adaptor with a given coefficient. A method and circuit configuration for avoiding overflows in the filter include multiplying a signal emitted by the transfer filter to the gradient filter by a scaling factor being equal to the difference between 1 and the amount of the given coefficient.
摘要翻译： 自适应递归数字滤波器包括传送滤波器和梯度滤波器，每个具有给定系数的相应适配器。 用于避免滤波器中的溢出的方法和电路配置包括将由传输滤波器发射的信号与梯度滤波器相乘，比例因子等于1与给定系数的量之间的差。
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