公开(公告)号：US07619687B1

公开(公告)日：2009-11-17

申请号：US11957354

申请日：2007-12-14

申请人： Stephen D. Lew ,  Garry W. Amann ,  Hassane S. Azar

发明人： Stephen D. Lew ,  Garry W. Amann ,  Hassane S. Azar

IPC分类号： H04N7/01 ,  H04N11/20

CPC分类号： H04N19/86 ,  H04N7/01 ,  H04N7/012

摘要： Video filtering using a programmable graphics processor is described. The programmable graphics processor may be programmed to complete a plurality of video filtering operations in a single pass through a fragment-processing pipeline within the programmable graphics processor. Video filtering functions such as deinterlacing, chroma up-sampling, scaling, and deblocking may be performed by the fragment-processing pipeline. The fragment-processing pipeline may be programmed to perform motion adaptive deinterlacing, wherein a spatially variant filter determines, on a pixel basis, whether a “bob”, a “blend”, or a “weave” operation should be used to process an interlaced image.

摘要翻译： 描述使用可编程图形处理器的视频滤波。 可编程图形处理器可以被编程为在可编程图形处理器内的片段处理流水线的单次传递中完成多个视频滤波操作。 诸如去隔行，色度上采样，缩放和去块之类的视频滤波功能可以由片段处理流水线执行。 片段处理流水线可以被编程为执行运动自适应去隔行，其中空间变异滤波器基于像素确定是否应当使用“bob”，“blend”或“weave”操作来处理隔行扫描 图片。

公开(公告)号：US07876378B1

公开(公告)日：2011-01-25

申请号：US11957361

申请日：2007-12-14

申请人： Stephen D. Lew ,  Garry W. Amann ,  Hassane S. Azar

发明人： Stephen D. Lew ,  Garry W. Amann ,  Hassane S. Azar

IPC分类号： H04N5/917

CPC分类号： H04N19/86 ,  H04N7/01 ,  H04N7/012

摘要： Video filtering using a programmable graphics processor is described. The programmable graphics processor may be programmed to complete a plurality of video filtering operations in a single pass through a fragment-processing pipeline within the programmable graphics processor. Video filtering functions such as deinterlacing, chroma up-sampling, scaling, and deblocking may be performed by the fragment-processing pipeline. The fragment-processing pipeline may be programmed to perform motion adaptive deinterlacing, wherein a spatially variant filter determines, on a pixel basis, whether a “bob”, a “blend”, or a “weave” operation should be used to process an interlaced image.

摘要翻译： 描述使用可编程图形处理器的视频滤波。 可编程图形处理器可以被编程为在可编程图形处理器内的片段处理流水线的单次传递中完成多个视频滤波操作。 诸如去隔行，色度上采样，缩放和去块之类的视频滤波功能可以由片段处理流水线执行。 片段处理流水线可以被编程为执行运动自适应去隔行，其中空间变异滤波器基于像素确定是否应当使用“bob”，“blend”或“weave”操作来处理隔行扫描 图片。

公开(公告)号：US07705915B1

公开(公告)日：2010-04-27

申请号：US11957360

申请日：2007-12-14

申请人： Stephen D. Lew ,  Garry W. Amann ,  Hassane S. Azar

发明人： Stephen D. Lew ,  Garry W. Amann ,  Hassane S. Azar

IPC分类号： H04N7/01 ,  H04N11/20

CPC分类号： H04N19/86 ,  H04N7/01 ,  H04N7/012

摘要： Video filtering using a programmable graphics processor is described. The programmable graphics processor may be programmed to complete a plurality of video filtering operations in a single pass through a fragment-processing pipeline within the programmable graphics processor. Video filtering functions such as deinterlacing, chroma up-sampling, scaling, and deblocking may be performed by the fragment-processing pipeline. The fragment-processing pipeline may be programmed to perform motion adaptive deinterlacing, wherein a spatially variant filter determines, on a pixel basis, whether a “bob”, a “blend”, or a “weave” operation should be used to process an interlaced image.

摘要翻译： 描述使用可编程图形处理器的视频滤波。 可编程图形处理器可以被编程为在可编程图形处理器内的片段处理流水线的单次传递中完成多个视频滤波操作。 诸如去隔行，色度上采样，缩放和去块之类的视频滤波功能可以由片段处理流水线执行。 片段处理流水线可以被编程为执行运动自适应去隔行，其中空间变异滤波器基于像素确定是否应当使用“bob”，“blend”或“weave”操作来处理隔行扫描 图片。

公开(公告)号：US08520009B1

公开(公告)日：2013-08-27

申请号：US12649188

申请日：2009-12-29

申请人： Stephen D. Lew ,  Garry W. Amann ,  Hassane S. Azar

发明人： Stephen D. Lew ,  Garry W. Amann ,  Hassane S. Azar

IPC分类号： G06T1/20

CPC分类号： H04N19/86 ,  H04N7/01 ,  H04N7/012

摘要： Video filtering using a programmable graphics processor is described. The programmable graphics processor may be programmed to complete a plurality of video filtering operations in a single pass through a fragment-processing pipeline within the programmable graphics processor. Video filtering functions such as deinterlacing, chroma up-sampling, scaling, and deblocking may be performed by the fragment-processing pipeline. The fragment-processing pipeline may be programmed to perform motion adaptive deinterlacing, wherein a spatially variant filter determines, on a pixel basis, whether a “bob”, a “blend”, or a “weave” operation should be used to process an interlaced image.

公开(公告)号：US07733419B1

公开(公告)日：2010-06-08

申请号：US11957363

申请日：2007-12-14

申请人： Stephen D. Lew ,  Garry W. Amann ,  Hassane S. Azar

发明人： Stephen D. Lew ,  Garry W. Amann ,  Hassane S. Azar

IPC分类号： H04N7/01

CPC分类号： H04N19/86 ,  H04N7/01 ,  H04N7/012

摘要： Video filtering using a programmable graphics processor is described. The programmable graphics processor may be programmed to complete a plurality of video filtering operations in a single pass through a fragment-processing pipeline within the programmable graphics processor. Video filtering functions such as deinterlacing, chroma up-sampling, scaling, and deblocking may be performed by the fragment-processing pipeline. The fragment-processing pipeline may be programmed to perform motion adaptive deinterlacing, wherein a spatially variant filter determines, on a pixel basis, whether a “bob”, a “blend”, or a “weave” operation should be used to process an interlaced image.

公开(公告)号：US07508448B1

公开(公告)日：2009-03-24

申请号：US10448590

申请日：2003-05-29

申请人： Stephen D. Lew ,  Garry W. Amann ,  Hassane S. Azar

发明人： Stephen D. Lew ,  Garry W. Amann ,  Hassane S. Azar

IPC分类号： H04N7/01 ,  H04N11/20

CPC分类号： H04N19/86 ,  H04N7/01 ,  H04N7/012

摘要： Video filtering using a programmable graphics processor is described. The programmable graphics processor may be programmed to complete a plurality of video filtering operations in a single pass through a fragment-processing pipeline within the programmable graphics processor. Video filtering functions such as deinterlacing, chroma up-sampling, scaling, and deblocking may be performed by the fragment-processing pipeline. The fragment-processing pipeline may be programmed to perform motion adaptive deinterlacing, wherein a spatially variant filter determines, on a pixel basis, whether a “bob”, a “blend”, or a “weave” operation should be used to process an interlaced image.

公开(公告)号：US20140055559A1

公开(公告)日：2014-02-27

申请号：US13568875

申请日：2012-08-07

申请人： Jen-Hsun Huang ,  Gerrit A. Slavenburg ,  Stephen D. Lew ,  John C. Schafer ,  Thomas F. Fox ,  Taner E. Ozcelik

发明人： Jen-Hsun Huang ,  Gerrit A. Slavenburg ,  Stephen D. Lew ,  John C. Schafer ,  Thomas F. Fox ,  Taner E. Ozcelik

IPC分类号： G06T15/00 ,  H04N13/00

CPC分类号： G06T15/005 ,  G06F15/78 ,  G09G5/003 ,  G09G2360/02 ,  H04N13/161

摘要： Circuits, methods, and apparatus that provide highly integrated digital media processors for digital consumer electronics applications. These digital media processors are capable of performing the parallel processing of multiple format audio, video, and graphics signals. In one embodiment, audio and video signals may be received from a variety of input devices or appliances, such as antennas, VCRs, DVDs, and networked devices such as camcorders and modems, while output audio and video signals may be provided to output devices such as televisions, monitors, and networked devices such as printers and networked video recorders. Another embodiment of the present invention interfaces with a variety of devices such as navigation, entertainment, safety, memory, and networking devices. This embodiment can also be configured for use in a digital TV, set-top box, or home server. In this configuration, video and audio streams may be received from a number of cable, satellite, Internet, and consumer devices.

摘要翻译： 为数字消费电子应用提供高度集成的数字媒体处理器的电路，方法和设备。 这些数字媒体处理器能够执行多格式音频，视频和图形信号的并行处理。 在一个实施例中，音频和视频信号可以从诸如天线，VCR，DVD以及诸如摄像机和调制解调器之类的网络设备的各种输入设备或设备接收，而输出音频和视频信号可以被提供给诸如 作为电视机，显示器和网络设备，如打印机和网络录像机。 本发明的另一实施例与诸如导航，娱乐，安全，存储器和网络设备的各种设备接口。 该实施例还可以被配置为用于数字电视，机顶盒或家庭服务器中。 在该配置中，可以从多个有线，卫星，因特网和消费者设备接收视频和音频流。

公开(公告)号：US08203562B1

公开(公告)日：2012-06-19

申请号：US12243766

申请日：2008-10-01

申请人： Jonah M. Alben ,  Stephen D. Lew ,  Paolo E. Sabella

发明人： Jonah M. Alben ,  Stephen D. Lew ,  Paolo E. Sabella

IPC分类号： G06T15/00 ,  G06F15/16

CPC分类号： G06F15/16 ,  G06F9/5044 ,  G06T1/20 ,  G06T15/005 ,  G09G5/363 ,  G09G2330/021 ,  G09G2360/06 ,  Y02D10/22

摘要： An integrated circuit includes at least two different types of processors, such as a graphics processor and a video processor. At least one operation is commonly by supported by two different types of processors. For each commonly supported operation that is scheduled, a decision is made to determine which type of processor will be selected to implement the operation.

摘要翻译： 集成电路包括至少两种不同类型的处理器，诸如图形处理器和视频处理器。 通常由两种不同类型的处理器支持至少一种操作。 对于被调度的每个通常支持的操作，作出决定以确定将选择哪种类型的处理器来实现该操作。

公开(公告)号：US20110238955A1

公开(公告)日：2011-09-29

申请号：US13099035

申请日：2011-05-02

申请人： John R. Nickolls ,  Stephen D. Lew

发明人： John R. Nickolls ,  Stephen D. Lew

IPC分类号： G06F9/30

CPC分类号： G06F9/3851 ,  G06F9/30072 ,  G06F9/3012 ,  G06F9/3889 ,  G06F9/5066

摘要： Parallelism in a parallel processing subsystem is exploited in a scalable manner. A problem to be solved can be hierarchically decomposed into at least two levels of sub-problems. Individual threads of program execution are defined to solve the lowest-level sub-problems. The threads are grouped into one or more thread arrays, each of which solves a higher-level sub-problem. The thread arrays are executable by processing cores, each of which can execute at least one thread array at a time. Thread arrays can be grouped into grids of independent thread arrays, which solve still higher-level sub-problems or an entire problem. Thread arrays within a grid, or entire grids, can be distributed across all of the available processing cores as available in a particular system implementation.

摘要翻译： 并行处理子系统中的并行性以可扩展的方式被利用。 要解决的问题可以被分层分解成至少两个级别的子问题。 定义程序执行的各个线程来解决最低级别的问题。 线程被分组成一个或多个线程数组，每个线程数组都解决了较高级的子问题。 线程数组可以通过处理内核执行，每个核心可以一次执行至少一个线程数组。 线程数组可以分组成独立线程数组的网格，从而解决更高级的子问题或整个问题。 网格中的线程数组或整个网格可以分布在所有可用处理核心中，如特定系统实现中可用的。

公开(公告)号：US07861060B1

公开(公告)日：2010-12-28

申请号：US11305178

申请日：2005-12-15

申请人： John R. Nickolls ,  Stephen D. Lew

发明人： John R. Nickolls ,  Stephen D. Lew

IPC分类号： G06F15/16

CPC分类号： G06F9/544 ,  G06F9/3851 ,  G06F9/3887 ,  G06F9/522

摘要： Parallel data processing systems and methods use cooperative thread arrays (CTAs), i.e., groups of multiple threads that concurrently execute the same program on an input data set to produce an output data set. Each thread in a CTA has a unique identifier (thread ID) that can be assigned at thread launch time. The thread ID controls various aspects of the thread's processing behavior such as the portion of the input data set to be processed by each thread, the portion of an output data set to be produced by each thread, and/or sharing of intermediate results among threads. Mechanisms for loading and launching CTAs in a representative processing core and for synchronizing threads within a CTA are also described.

摘要翻译： 并行数据处理系统和方法使用协同线程数组（CIA），即在输入数据集上同时执行相同程序的多线程组，以产生输出数据集。 CTA中的每个线程都有一个唯一的标识符（线程ID），可以在线程启动时分配。 线程ID控制线程的处理行为的各个方面，例如由每个线程处理的输入数据集的部分，由每个线程产生的输出数据集的部分和/或线程之间的中间结果的共享 。 还描述了在代表性处理核心中加载和启动CTA并在CTA内同步线程的机制。