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    Systems and methods for dynamically scanning a plurality of active ports for priority schedule of work
    1.
    发明授权
    Systems and methods for dynamically scanning a plurality of active ports for priority schedule of work 失效
    用于动态扫描多个活动端口用于工作优先级的系统和方法

    公开(公告)号：US08407710B2

    公开(公告)日：2013-03-26

    申请号：US12904715

    申请日：2010-10-14

    申请人： Stephen L. Blinick ,  Steven E. Klein ,  Daniel W. Sherman

    发明人： Stephen L. Blinick ,  Steven E. Klein ,  Daniel W. Sherman

    IPC分类号： G06F9/46 ,  G06F3/00 ,  G06F5/00 ,  G06F12/00 ,  G06F13/14 ,  G06F13/38

    CPC分类号： G06F9/4843

    摘要： Systems and methods for scanning ports for work are provided. One system includes one or more processors, multiple ports, a first tracking mechanism, and a second tracking mechanism for tracking high priority work and low priority work, respectively. The processor(s) is/are configured to perform the below method. One method includes scanning the ports, finding high priority work on a port, and accepting or declining the high priority work. The method further includes changing a designation of the processor to TRUE in the first tracking mechanism if the processor accepts the high priority work such that the processor is allowed to perform the high priority work on the port. Also provided are computer storage mediums including computer code for performing the above method.

    摘要翻译： 提供扫描工作端口的系统和方法。 一个系统包括分别用于跟踪高优先级工作和低优先级工作的一个或多个处理器，多个端口，第一跟踪机构和第二跟踪机构。 处理器被配置为执行以下方法。 一种方法包括扫描端口，在端口上找到高优先级的工作，以及接受或拒绝高优先级的工作。 该方法还包括如果处理器接受高优先级的工作，使处理器能够在端口上执行高优先级的工作，则在第一跟踪机构中将处理器的指定改变为TRUE。 还提供了包括用于执行上述方法的计算机代码的计算机存储介质。

    SECONDARY CACHE FOR WRITE ACCUMULATION AND COALESCING
    5.
    发明申请
    SECONDARY CACHE FOR WRITE ACCUMULATION AND COALESCING 有权
    用于写入累积和分析的二次高速缓存

    公开(公告)号：US20120191904A1

    公开(公告)日：2012-07-26

    申请号：US13430613

    申请日：2012-03-26

    申请人： Stephen L. Blinick ,  Lokesh M. Gupta ,  Yu-Cheng Hsu ,  Cheng-Chung Song

    发明人： Stephen L. Blinick ,  Lokesh M. Gupta ,  Yu-Cheng Hsu ,  Cheng-Chung Song

    IPC分类号： G06F12/02 ,  G06F12/08

    CPC分类号： G06F12/0804 ,  G06F11/1008 ,  G06F11/1076 ,  G06F12/0866

    摘要： A method for efficiently using a large secondary cache is disclosed herein. In certain embodiments, such a method may include accumulating, in a secondary cache, a plurality of data tracks. These data tracks may include modified data and/or unmodified data. The method may determine if a subset of the plurality of data tracks makes up a full stride. In the event the subset makes up a full stride, the method may destage the subset from the secondary cache. By destaging full strides, the method reduces the number of disk operations that are required to destage data from the secondary cache. A corresponding computer program product and apparatus are also disclosed herein.

    摘要翻译： 本文公开了一种高效地使用大型二级高速缓存的方法。 在某些实施例中，这种方法可以包括在二次高速缓存中累积多个数据轨道。 这些数据轨道可以包括经修改的数据和/或未修改的数据。 该方法可以确定多个数据轨道的一个子集是否构成一个完整的步幅。 在子集构成一个完整的步骤的情况下，该方法可能会从二级缓存中退出该子集。 通过降级整个步骤，该方法减少了从二级缓存中恢复数据所需的磁盘操作数。 本文还公开了相应的计算机程序产品和装置。

    MULTI-CHARACTER ADAPTER CARD
    6.
    发明申请
    MULTI-CHARACTER ADAPTER CARD 失效
    多字符适配卡

    公开(公告)号：US20080301345A1

    公开(公告)日：2008-12-04

    申请号：US11754821

    申请日：2007-05-29

    申请人： Stephen L. Blinick ,  Carol Spanel ,  Andrew Dale Walls

    发明人： Stephen L. Blinick ,  Carol Spanel ,  Andrew Dale Walls

    IPC分类号： G06F13/00

    CPC分类号： G06F13/385

    摘要： One embodiment of an adapter card in accordance with the invention includes a circuit board connectable to a motherboard of a computer system. A logic chip is connected to the circuit board to provide functionality to the adapter card. One or more programmable devices are connected to the circuit board and store data read by the logic chip upon initialization. This data may include first character data to program the logic chip to have a first character and second character data to program the logic chip to have a second character. A switching mechanism is provided to switch between the first and second character data in response to an external input, thereby causing the logic chip to read one of the first and second character data.

    摘要翻译： 根据本发明的适配器卡的一个实施例包括可连接到计算机系统的主板的电路板。 逻辑芯片连接到电路板以向适配器卡提供功能。 一个或多个可编程设备连接到电路板，并在初始化时存储由逻辑芯片读取的数据。 该数据可以包括用于对逻辑芯片编程以具有第一字符和第二字符数据的第一字符数据，以将逻辑芯片编程为具有第二字符。 提供切换机制以响应于外部输入在第一和第二字符数据之间切换，从而使逻辑芯片读取第一和第二字符数据之一。

    Non-disruptive code update of a single processor in a multi-processor computing system
    7.
    发明授权
    Non-disruptive code update of a single processor in a multi-processor computing system 有权
    多处理器计算系统中单个处理器的无中断代码更新

    公开(公告)号：US08898653B2

    公开(公告)日：2014-11-25

    申请号：US11769083

    申请日：2007-06-27

    申请人： Stephen L. Blinick ,  Chiahong Chen

    发明人： Stephen L. Blinick ,  Chiahong Chen

    IPC分类号： G06F9/44 ,  G06F9/445

    CPC分类号： G06F9/44505 ,  G06F8/65 ,  G06F9/4401

    摘要： Updating code of a single processor in a multi-processor system includes halting transactions processed by a first processor in the system and processing of transactions by a second processor in the system are maintained. The first processor then receives new code and an operating system running on the first processor is terminated whereby all processes and threads being executed by the first processor are terminated. Execution of a self-reset of the first processor is commenced and interrupts associated with the first processor are disabled. Only those system resources exclusively associated with the first processor are reset, and memory transactions associated with the first processor are disabled. An image of the new code is copied into memory associated with the first processor, registers associated with the first processor are reset and the new code is booted by the first processor.

    摘要翻译： 在多处理器系统中更新单个处理器的代码包括停止由系统中的第一处理器处理的事务，并且维护由系统中的第二处理器处理事务的处理。 然后，第一处理器接收新的代码，并且终止在第一处理器上运行的操作系统，由此终止由第一处理器执行的所有进程和线程。 开始执行第一处理器的自复位，并且禁用与第一处理器相关联的中断。 只有与第一处理器完全相关联的系统资源被重置，并且与第一处理器相关联的存储器事务被禁用。 将新代码的图像复制到与第一处理器相关联的存储器中，与第一处理器相关联的寄存器被复位，并且新代码由第一处理器引导。

    Method to enable user mode process to operate in a privileged execution mode
    9.
    发明授权
    Method to enable user mode process to operate in a privileged execution mode 失效
    允许用户模式进程在特权执行模式下运行的方法

    公开(公告)号：US07669050B2

    公开(公告)日：2010-02-23

    申请号：US10877910

    申请日：2004-06-24

    申请人： Stephen L. Blinick ,  Yu-Cheng Hsu

    发明人： Stephen L. Blinick ,  Yu-Cheng Hsu

    IPC分类号： H04L29/06

    CPC分类号： G06F9/468

    摘要： A method to enable a user mode process to operate in a privileged execution mode is disclosed. Applicants' method provides an operating system comprising a privileged execution mode and a non-privileged execution mode, and a plurality of user mode strings operating in the non-privileged execution mode. The computing device receives a request from a first user mode string to operate in the privileged execution mode to perform one or more designated tasks. Applicants' method authorizes the first user mode string to operate in the privileged execution mode, and the first user mode string performs those one or more designated tasks using the privileged execution mode. Applicants' method continues to permit the first user mode string to operate in the privileged execution mode after completion of the one or more designated tasks.

    摘要翻译： 公开了一种使用户模式进程能够以特权执行模式运行的方法。 申请人的方法提供包括特权执行模式和非特权执行模式的操作系统以及以非特权执行模式操作的多个用户模式串。 计算设备接收来自第一用户模式串的请求，以在特权执行模式下操作以执行一个或多个指定的任务。 申请人的方法授权第一用户模式字符串在特权执行模式下运行，第一用户模式字符串使用特权执行模式执行那些一个或多个指定任务。 申请人的方法继续允许第一用户模式字符串在完成一个或多个指定任务之后以特权执行模式操作。

    Method and Apparatus for Adjusting Sleep Time of Fixed High-Priority Threads
    10.
    发明申请
    Method and Apparatus for Adjusting Sleep Time of Fixed High-Priority Threads 失效
    调整固定高优先级线程睡眠时间的方法和装置

    公开(公告)号：US20080155549A1

    公开(公告)日：2008-06-26

    申请号：US11613613

    申请日：2006-12-20

    申请人： Stephen L. Blinick ,  Scott A. Brewer ,  Chiahong Chen ,  Daniel A. Heffley ,  Radha K. Ramachandran

    发明人： Stephen L. Blinick ,  Scott A. Brewer ,  Chiahong Chen ,  Daniel A. Heffley ,  Radha K. Ramachandran

    IPC分类号： G06F9/46

    CPC分类号： G06F9/485

    摘要： A sleep function capable of putting a fixed high-priority thread to sleep within a time-window is disclosed. After a sleep request has been made by a fixed high-priority thread via the sleep function, a determination is made whether or not the fixed high-priority thread is awoken before a requested sleep duration under the sleep request. If the fixed high-priority thread is awoken before the requested sleep duration, the number of tasks for the fixed high-priority thread to perform is increased in order to delay the start sleep time of the fixed high-priority thread from a point within a first time-window in which the sleep request was made to an end boundary of the first time-window.

    摘要翻译： 公开了能够使固定的高优先级线程在时间窗内睡眠的睡眠功能。 在通过睡眠功能由固定的高优先级线程进行了睡眠请求之后，确定在睡眠请求之前的所请求的睡眠持续时间之前固定的高优先级线程是否被唤醒。 如果固定的高优先级线程在所请求的睡眠持续时间之前被唤醒，则增加固定高优先级线程的任务数量，以便将固定的高优先级线程的开始休眠时间从 睡眠请求的第一个时间窗口到达第一个时间窗口的结束边界。