公开(公告)号：US20060206649A1

公开(公告)日：2006-09-14

申请号：US11417943

申请日：2006-05-03

申请人： Stephen Papa ,  Carlton Amdahl ,  Michael Henderson ,  Don Agneta ,  Don Schiro ,  Dennis Smith

发明人： Stephen Papa ,  Carlton Amdahl ,  Michael Henderson ,  Don Agneta ,  Don Schiro ,  Dennis Smith

IPC分类号： G06F13/00

CPC分类号： G06F1/20 ,  G06F1/206 ,  G06F1/26 ,  G06F3/0601 ,  G06F9/4411 ,  G06F11/0748 ,  G06F11/0766 ,  G06F11/0793 ,  G06F11/2294 ,  G06F11/328 ,  G06F11/3466 ,  G06F11/3476 ,  G06F11/3495 ,  G06F13/385 ,  G06F13/4027 ,  G06F13/4081 ,  G06F13/409 ,  G06F21/305 ,  G06F21/31 ,  G06F2003/0692 ,  G06F2201/86 ,  H02P7/285 ,  H04L12/12 ,  H04L41/0213 ,  H04L41/0659 ,  H04L41/0806 ,  H04L41/12 ,  H04L41/22 ,  H04L43/00 ,  H04L49/90 ,  H04L49/9063 ,  H04L49/9073 ,  H04L67/1002 ,  H05K7/1492 ,  H05K7/207 ,  H05K7/20736 ,  Y02D50/40

摘要： A method of electrically coupling a central processing unit (CPU) of a network server to a plurality of network interface modules. The method comprises providing each of the plurality of network interface modules with a respective bus adapter chip to route an I/O bus having a first format from the central processing unit to a primary side of each of the plurality of bus adaptor chips and routing another I/O bus of the first format from a secondary side of each of the plurality of bus adapter chips to respective ones of the network interface modules. The bus adapter chips also provide for arbitered access along the I/O buses and isolation of the CPU from electrical disruption when one the network interface modules is removed.