公开(公告)号：US07235487B2

公开(公告)日：2007-06-26

申请号：US10709562

申请日：2004-05-13

申请人： Steven P Barkyoumb ,  Jonathan D. Chapple-Sokol ,  Edward C. Cooney, III ,  Keith E. Downes ,  Thomas L. McDevitt ,  William J. Murphy

发明人： Steven P Barkyoumb ,  Jonathan D. Chapple-Sokol ,  Edward C. Cooney, III ,  Keith E. Downes ,  Thomas L. McDevitt ,  William J. Murphy

IPC分类号： H01L21/44

CPC分类号： H01L21/76843 ,  H01L21/76856 ,  H01L21/76859 ,  H01L21/76861 ,  H01L21/76862 ,  H01L21/76871 ,  H01L21/76873

摘要： A method and structure for reducing the corrosion of the copper seed layer during the fabrication process of a semiconductor structure. Before the structure (or the wafer containing the structure) exits the vacuum environment of the sputter tool, the structure is warmed up to a temperature above the water condensation temperature of the environment outside the sputter tool. As a result, water vapor would not condense on the structure when the structure exits the sputter tool, and therefore, corrosion of the seed layer by the water vapor is prevented. Alternatively, a protective layer resistant to water vapor can be formed on top of the seed layer before the structure exits the sputter tool environment. In yet another alternative embodiment, the seed layer can comprises a copper alloy (such as with aluminum) which grows a protective layer resistant to water vapor upon exposure to water vapor.

摘要翻译： 一种用于在半导体结构的制造过程中减少铜籽晶层的腐蚀的方法和结构。 在结构（或包含结构的晶片）离开溅射工具的真空环境之前，将结构加热到高于溅射工具外部环境的水冷凝温度的温度。 结果，当结构离开溅射工具时，水蒸气不会在结构上冷凝，因此防止了水蒸气对种子层的腐蚀。 或者，在结构离开溅射工具环境之前，可以在籽晶层的顶部形成耐水蒸汽的保护层。 在另一替代实施例中，种子层可以包括铜合金（例如用铝），其在暴露于水蒸汽时生长出耐水蒸气的保护层。

公开(公告)号：US07879716B2

公开(公告)日：2011-02-01

申请号：US11687017

申请日：2007-03-16

申请人： Steven P. Barkyoumb ,  Jonathan D. Chapple-Sokol ,  Edward C. Cooney, III ,  Keith E. Downes ,  Thomas L. McDevitt ,  William J. Murphy

发明人： Steven P. Barkyoumb ,  Jonathan D. Chapple-Sokol ,  Edward C. Cooney, III ,  Keith E. Downes ,  Thomas L. McDevitt ,  William J. Murphy

IPC分类号： H01L21/4763

CPC分类号： H01L21/76843 ,  H01L21/76856 ,  H01L21/76859 ,  H01L21/76861 ,  H01L21/76862 ,  H01L21/76871 ,  H01L21/76873

摘要： A method and structure for reducing the corrosion of the copper seed layer during the fabrication process of a semiconductor structure. Before the structure (or the wafer containing the structure) exits the vacuum environment of the sputter tool, the structure is warmed up to a temperature above the water condensation temperature of the environment outside the sputter tool. As a result, water vapor would not condense on the structure when the structure exits the sputter tool, and therefore, corrosion of the seed layer by the water vapor is prevented. Alternatively, a protective layer resistant to water vapor can be formed on top of the seed layer before the structure exits the sputter tool environment. In yet another alternative embodiment, the seed layer can comprises a copper alloy (such as with aluminum) which grows a protective layer resistant to water vapor upon exposure to water vapor.

摘要翻译： 一种用于在半导体结构的制造过程中减少铜籽晶层的腐蚀的方法和结构。 在结构（或包含结构的晶片）离开溅射工具的真空环境之前，将结构加热到高于溅射工具外部环境的水冷凝温度的温度。 结果，当结构离开溅射工具时，水蒸气不会在结构上冷凝，因此防止了水蒸气对种子层的腐蚀。 或者，在结构离开溅射工具环境之前，可以在籽晶层的顶部形成耐水蒸汽的保护层。 在另一替代实施例中，种子层可以包括铜合金（例如用铝），其在暴露于水蒸汽时生长出耐水蒸气的保护层。

公开(公告)号：US20090212434A1

公开(公告)日：2009-08-27

申请号：US12035449

申请日：2008-02-22

申请人： Felix P. Anderson ,  Steven P. Barkyoumb ,  Edward C. Cooney, III ,  Thomas L. McDevitt ,  William J. Murphy ,  David C. Strippe

发明人： Felix P. Anderson ,  Steven P. Barkyoumb ,  Edward C. Cooney, III ,  Thomas L. McDevitt ,  William J. Murphy ,  David C. Strippe

IPC分类号： H01L21/768 ,  H01L23/538

CPC分类号： H01L23/53209 ,  C23C14/02 ,  C23C14/0641 ,  H01L21/2855 ,  H01L21/76843 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

摘要： Processes for improving adhesion of films to semiconductor wafers and a semiconductor structure are provided. By implementing the processes of the invention, it is possible to significantly suppress defect creation, e.g., decrease particle generation, during wafer fabrication processes. More specifically, the processes described significantly reduce flaking of a TaN film from edges or extreme edges (bevel) of the wafer by effectively increasing the adhesion properties of the TaN film on the wafer. The method increasing a mol percent of nitride with respect to a total tantalum plus nitride to 25% or greater during a barrier layer fabrication process.

摘要翻译： 提供了用于提高膜对半导体晶片和半导体结构的附着力的方法。 通过实施本发明的方法，可以在晶片制造工艺期间显着抑制缺陷产生，例如减少颗粒产生。 更具体地，所描述的工艺通过有效地增加TaN膜在晶片上的粘合性能，显着地减少了晶片的边缘或边缘（斜面）对TaN膜的剥落。 在阻挡层制造过程中，相对于总钽加氮化物将氮化物的摩尔百分数提高到25％或更大的方法。

公开(公告)号：US08969195B2

公开(公告)日：2015-03-03

申请号：US12035449

申请日：2008-02-22

申请人： Felix P. Anderson ,  Steven P. Barkyoumb ,  Edward C. Cooney, III ,  Thomas L. McDevitt ,  William J. Murphy ,  David C. Strippe

发明人： Felix P. Anderson ,  Steven P. Barkyoumb ,  Edward C. Cooney, III ,  Thomas L. McDevitt ,  William J. Murphy ,  David C. Strippe

IPC分类号： H01L21/44 ,  H01L21/285 ,  C23C14/02 ,  C23C14/06 ,  H01L21/768

CPC分类号： H01L23/53209 ,  C23C14/02 ,  C23C14/0641 ,  H01L21/2855 ,  H01L21/76843 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

摘要： Processes for improving adhesion of films to semiconductor wafers and a semiconductor structure are provided. By implementing the processes of the invention, it is possible to significantly suppress defect creation, e.g., decrease particle generation, during wafer fabrication processes. More specifically, the processes described significantly reduce flaking of a TaN film from edges or extreme edges (bevel) of the wafer by effectively increasing the adhesion properties of the TaN film on the wafer. The method increasing a mol percent of nitride with respect to a total tantalum plus nitride to 25% or greater during a barrier layer fabrication process.

摘要翻译： 提供了用于改善膜对半导体晶片和半导体结构的附着力的方法。 通过实施本发明的方法，可以在晶片制造工艺期间显着抑制缺陷产生，例如减少颗粒产生。 更具体地，所描述的工艺通过有效地增加TaN膜在晶片上的粘合性能，显着地减少了晶片的边缘或边缘（斜面）对TaN膜的剥落。 在阻挡层制造过程中，相对于总钽加氮化物将氮化物的摩尔百分数提高到25％或更大的方法。

公开(公告)号：US08604618B2

公开(公告)日：2013-12-10

申请号：US13239533

申请日：2011-09-22

申请人： Edward C. Cooney, III ,  Jeffrey P. Gambino ,  Zhong-Xiang He ,  Xiao Hu Liu ,  Thomas L. McDevitt ,  Gary L. Milo ,  William J. Murphy

发明人： Edward C. Cooney, III ,  Jeffrey P. Gambino ,  Zhong-Xiang He ,  Xiao Hu Liu ,  Thomas L. McDevitt ,  Gary L. Milo ,  William J. Murphy

IPC分类号： H01L23/485 ,  H01L21/3205

CPC分类号： H01L21/76802 ,  H01L21/7682 ,  H01L23/5222 ,  H01L23/53295 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device and a method of fabricating the same, includes vertically stacked layers on an insulator. Each of the layers includes a first dielectric insulator portion, a first metal conductor embedded within the first dielectric insulator portion, a first nitride cap covering the first metal conductor, a second dielectric insulator portion, a second metal conductor embedded within the second dielectric insulator portion, and a second nitride cap covering the second metal conductor. The first and second metal conductors form first vertically stacked conductor layers and second vertically stacked conductor layers. The first vertically stacked conductor layers are proximate the second vertically stacked conductor layers, and at least one air gap is positioned between the first vertically stacked conductor layers and the second vertically stacked conductor layers. An upper semiconductor layer covers the first vertically stacked conductor layers, the air gap and the second plurality of vertically stacked conductor layers.

摘要翻译： 半导体器件及其制造方法包括在绝缘体上的垂直堆叠的层。 每个层包括第一介电绝缘体部分，嵌入在第一介电绝缘体部分内的第一金属导体，覆盖第一金属导体的第一氮化物帽，第二电介质绝缘体部分，嵌入在第二介电绝缘体部分内的第二金属导体 以及覆盖所述第二金属导体的第二氮化物帽。 第一和第二金属导体形成第一垂直堆叠的导体层和第二垂直堆叠的导体层。 第一垂直堆叠的导体层靠近第二垂直堆叠的导体层，并且至少一个气隙位于第一垂直堆叠的导体层和第二垂直堆叠的导体层之间。 上半导体层覆盖第一垂直堆叠的导体层，气隙和第二多个垂直堆叠的导体层。

公开(公告)号：US20130075913A1

公开(公告)日：2013-03-28

申请号：US13239533

申请日：2011-09-22

申请人： Edward C. Cooney, III ,  Jeffrey P. Gambino ,  Zhong-Xiang He ,  Xiao Hu Liu ,  Thomas L. McDevitt ,  Gary L. Milo ,  William J. Murphy

发明人： Edward C. Cooney, III ,  Jeffrey P. Gambino ,  Zhong-Xiang He ,  Xiao Hu Liu ,  Thomas L. McDevitt ,  Gary L. Milo ,  William J. Murphy

IPC分类号： H01L23/485 ,  H01L21/3205

CPC分类号： H01L21/76802 ,  H01L21/7682 ,  H01L23/5222 ,  H01L23/53295 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device and a method of fabricating the same, includes vertically stacked layers on an insulator. Each of the layers includes a first dielectric insulator portion, a first metal conductor embedded within the first dielectric insulator portion, a first nitride cap covering the first metal conductor, a second dielectric insulator portion, a second metal conductor embedded within the second dielectric insulator portion, and a second nitride cap covering the second metal conductor. The first and second metal conductors form first vertically stacked conductor layers and second vertically stacked conductor layers. The first vertically stacked conductor layers are proximate the second vertically stacked conductor layers, and at least one air gap is positioned between the first vertically stacked conductor layers and the second vertically stacked conductor layers. An upper semiconductor layer covers the first vertically stacked conductor layers, the air gap and the second plurality of vertically stacked conductor layers.

公开(公告)号：US07173338B2

公开(公告)日：2007-02-06

申请号：US10708486

申请日：2004-03-06

申请人： Jonathan D. Chapple-Sokol ,  Terence B. Hook ,  Baozhen Li ,  Thomas L. McDevitt ,  Christopher A. Ponsolle ,  Bette B. Reuter ,  Timothy D. Sullivan ,  Jeffrey S. Zimmerman

发明人： Jonathan D. Chapple-Sokol ,  Terence B. Hook ,  Baozhen Li ,  Thomas L. McDevitt ,  Christopher A. Ponsolle ,  Bette B. Reuter ,  Timothy D. Sullivan ,  Jeffrey S. Zimmerman

IPC分类号： H01L23/48

CPC分类号： H01L21/7684 ,  H01L22/34 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method and structure for suppressing localized metal precipitate formation (LMPF) in semiconductor processing. For each metal wire that is exposed to the manufacturing environment and is electrically coupled to an N region, at least one P+ region is formed electrically coupled to the same metal wire. As a result, few excess electrons are available to combine with metal ions to form localized metal precipitate at the metal wire. A monitoring ramp terminal can be formed around and electrically disconnected from the metal wire. By applying a voltage difference to the metal wire and the monitoring ramp terminal and measuring the resulting current flowing through the metal wire and the monitoring ramp terminal, it can be determined whether localized metal precipitate is formed at the metal wire.

摘要翻译： 用于抑制半导体加工中的局部金属沉淀形成（LMPF）的方法和结构。 对于暴露于制造环境并且电耦合到N区域的每个金属线，至少一个P +区形成为电耦合到相同的金属线。 结果，几乎没有多余的电子可用于与金属离子结合以在金属线上形成局部金属沉淀。 可以在金属线周围形成监测斜坡端子并与金属线电断开。 通过向金属线和监视斜坡端子施加电压差并测量流过金属线和监视斜坡端子的所得电流，可以确定在金属线处是否形成了局部金属沉淀物。

公开(公告)号：US07572650B2

公开(公告)日：2009-08-11

申请号：US11550853

申请日：2006-10-19

申请人： Jonathan D. Chapple-Sokol ,  Terence B. Hook ,  Baozhen Li ,  Thomas L. McDevitt ,  Christopher A. Ponsolle ,  Bette B. Reuter ,  Timothy D. Sullivan ,  Jeffrey S. Zimmerman

发明人： Jonathan D. Chapple-Sokol ,  Terence B. Hook ,  Baozhen Li ,  Thomas L. McDevitt ,  Christopher A. Ponsolle ,  Bette B. Reuter ,  Timothy D. Sullivan ,  Jeffrey S. Zimmerman

IPC分类号： H01L21/00

CPC分类号： H01L21/7684 ,  H01L22/34 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method and structure for suppressing localized metal precipitate formation (LMPF) in semiconductor processing. For each metal wire that is exposed to the manufacturing environment and is electrically coupled to an N region, at least one P+ region is formed electrically coupled to the same metal wire. As a result, few excess electrons are available to combine with metal ions to form localized metal precipitate at the metal wire. A monitoring ramp terminal can be formed around and electrically disconnected from the metal wire. By applying a voltage difference to the metal wire and the monitoring ramp terminal and measuring the resulting current flowing through the metal wire and the monitoring ramp terminal, it can be determined whether localized metal precipitate is formed at the metal wire.

摘要翻译： 用于抑制半导体加工中的局部金属沉淀形成（LMPF）的方法和结构。 对于暴露于制造环境并且电耦合到N区域的每个金属线，至少一个P +区形成为电耦合到相同的金属线。 结果，几乎没有多余的电子可用于与金属离子结合以在金属线上形成局部金属沉淀。 可以在金属线周围形成监测斜坡端子并与金属线电断开。 通过向金属线和监视斜坡端子施加电压差并测量流过金属线和监视斜坡端子的所得电流，可以确定在金属线处是否形成了局部金属沉淀物。

公开(公告)号：US07649262B2

公开(公告)日：2010-01-19

申请号：US12537328

申请日：2009-08-07

申请人： Jonathan D. Chapple-Sokol ,  Terence B. Hook ,  Baozhen Li ,  Thomas L. McDevitt ,  Christopher A. Ponsolle ,  Bette B. Reuter ,  Timothy D. Sullivan ,  Jeffrey S. Zimmerman

发明人： Jonathan D. Chapple-Sokol ,  Terence B. Hook ,  Baozhen Li ,  Thomas L. McDevitt ,  Christopher A. Ponsolle ,  Bette B. Reuter ,  Timothy D. Sullivan ,  Jeffrey S. Zimmerman

IPC分类号： H01L23/48

CPC分类号： H01L21/7684 ,  H01L22/34 ,  H01L2924/0002 ,  H01L2924/00

摘要： A structure for suppressing localized metal precipitate formation (LMPF) in semiconductor processing. For each metal wire that is exposed to the manufacturing environment and is electrically coupled to an N region, at least one P+ region is formed electrically coupled to the same metal wire. As a result, few excess electrons are available to combine with metal ions to form localized metal precipitate at the metal wire. A monitoring ramp terminal can be formed around and electrically disconnected from the metal wire. By applying a voltage difference to the metal wire and the monitoring ramp terminal and measuring the resulting current flowing through the metal wire and the monitoring ramp terminal, it can be determined whether localized metal precipitate is formed at the metal wire.

摘要翻译： 用于抑制半导体处理中的局部金属沉淀形成（LMPF）的结构。 对于暴露于制造环境并且电耦合到N区域的每个金属线，至少一个P +区形成为电耦合到相同的金属线。 结果，几乎没有多余的电子可用于与金属离子结合以在金属线上形成局部金属沉淀。 可以在金属线周围形成监测斜坡端子并与金属线电断开。 通过向金属线和监视斜坡端子施加电压差并测量流过金属线和监视斜坡端子的所得电流，可以确定在金属线处是否形成了局部金属沉淀物。

公开(公告)号：US20090294968A1

公开(公告)日：2009-12-03

申请号：US12537328

申请日：2009-08-07

申请人： Jonathan D. Chapple-Sokol ,  Terence B. Hook ,  Baozhen Li ,  Thomas L. McDevitt ,  Christopher A. Ponsolle ,  Bette B. Reuter ,  Timothy D. Sullivan ,  Jeffrey S. Zimmerman

发明人： Jonathan D. Chapple-Sokol ,  Terence B. Hook ,  Baozhen Li ,  Thomas L. McDevitt ,  Christopher A. Ponsolle ,  Bette B. Reuter ,  Timothy D. Sullivan ,  Jeffrey S. Zimmerman

IPC分类号： H01L23/532

CPC分类号： H01L21/7684 ,  H01L22/34 ,  H01L2924/0002 ,  H01L2924/00

摘要： A structure for suppressing localized metal precipitate formation (LMPF) in semiconductor processing. For each metal wire that is exposed to the manufacturing environment and is electrically coupled to an N region, at least one P+ region is formed electrically coupled to the same metal wire. As a result, few excess electrons are available to combine with metal ions to form localized metal precipitate at the metal wire. A monitoring ramp terminal can be formed around and electrically disconnected from the metal wire. By applying a voltage difference to the metal wire and the monitoring ramp terminal and measuring the resulting current flowing through the metal wire and the monitoring ramp terminal, it can be determined whether localized metal precipitate is formed at the metal wire.

摘要翻译： 用于抑制半导体处理中的局部金属沉淀形成（LMPF）的结构。 对于暴露于制造环境并且电耦合到N区域的每个金属线，至少一个P +区形成为电耦合到相同的金属线。 结果，几乎没有多余的电子可用于与金属离子结合以在金属线上形成局部金属沉淀。 可以在金属线周围形成监测斜坡端子并与金属线电断开。 通过向金属线和监视斜坡端子施加电压差并测量流过金属线和监视斜坡端子的所得电流，可以确定在金属线处是否形成了局部金属沉淀物。