公开(公告)号：US07687838B2

公开(公告)日：2010-03-30

申请号：US11240570

申请日：2005-10-03

申请人： Seung-bum Hong ,  Ju-hwan Jung ,  Hyoung-soo Ko ,  Hong-sik Park ,  Dong-ki Min ,  Eun-sik Kim ,  Chul-min Park ,  Sung-dong Kim ,  Kyoung-lock Baeck

发明人： Seung-bum Hong ,  Ju-hwan Jung ,  Hyoung-soo Ko ,  Hong-sik Park ,  Dong-ki Min ,  Eun-sik Kim ,  Chul-min Park ,  Sung-dong Kim ,  Kyoung-lock Baeck

IPC分类号： H01L21/66 ,  H01L21/00 ,  G11B9/00 ,  G11B3/00 ,  G11B11/00

CPC分类号： H01L27/101 ,  B82Y10/00 ,  G11B9/02 ,  G11C11/22

摘要： Provided are a resistive memory device having a probe array and a method of manufacturing the same. The resistive memory device includes a memory part having a bottom electrode and a ferroelectric layer sequentially formed on a first substrate; a probe part having an array of resistive probes arranged on a second substrate, with the tips of the resistive probes facing the ferroelectric layer so as to write and read data on the ferroelectric layer; and a binding layer which grabs and fixes the resistive probes on or above the ferroelectric layer. The method of manufacturing the resistive memory device includes forming a bottom electrode and a ferroelectric layer sequentially on a first substrate; forming an array of resistive probes on a second substrate; and wafer level bonding the first substrate to the second substrate using a binding layer such that tips of the resistive probes face the ferroelectric layer.

摘要翻译： 提供了具有探针阵列的电阻式存储器件及其制造方法。 电阻式存储器件包括一个存储器部分，其具有顺序地形成在第一衬底上的底部电极和铁电层; 探针部分，其具有布置在第二基板上的电阻式探针阵列，其中所述电阻式探针的尖端面对强电介质层，以便在铁电层上写入和读取数据; 以及在铁电层上或上方抓住并固定电阻式探头的结合层。 制造电阻式存储器件的方法包括在第一衬底上依次形成底电极和铁电层; 在第二衬底上形成电阻性探针阵列; 并且使用结合层将第一衬底与第二衬底结合到晶片级，使得电阻探针的尖端面对强电介质层。

公开(公告)号：US07529119B2

公开(公告)日：2009-05-05

申请号：US11320898

申请日：2005-12-30

申请人： Sung-dong Kim ,  Eun-sik Kim ,  Ju-hwan Jung ,  Hyoung-soo Ko ,  Dong-ki Min ,  Hong-sik Park ,  Seung-bum Hong

发明人： Sung-dong Kim ,  Eun-sik Kim ,  Ju-hwan Jung ,  Hyoung-soo Ko ,  Dong-ki Min ,  Hong-sik Park ,  Seung-bum Hong

IPC分类号： G11C11/00

CPC分类号： H03K19/16 ,  H01L43/08

摘要： A magnetic logic device (MLD) and methods of manufacturing and operating an MLD are provided. The MLD includes: a first interconnection; a lower magnetic layer formed on the first interconnection, the lower magnetic layer having a magnetization direction fixed in a predetermined direction; a non-magnetic layer formed on the lower magnetic layer; an upper magnetic layer formed on the non-magnetic layer, the upper magnetic layer having a magnetization direction parallel or anti-parallel to the magnetization direction of the lower magnetic layer; and a second interconnection formed on the upper magnetic layer. A first current source is disposed between one end of the first interconnection and one end of the second interconnection and a second current source is disposed between the other end of the first interconnection and the other end of the second interconnection.

摘要翻译： 提供了一种磁逻辑器件（MLD）以及制造和操作MLD的方法。 MLD包括：第一个互连; 形成在所述第一互连上的下磁性层，所述下磁性层具有沿预定方向固定的磁化方向; 形成在下磁性层上的非磁性层; 形成在所述非磁性层上的上磁性层，所述上磁性层具有与所述下磁性层的磁化方向平行或反平行的磁化方向; 以及形成在上磁性层上的第二互连。 第一电流源设置在第一互连的一端和第二互连的一端之间，第二电流源设置在第一互连的另一端和第二互连的另一端之间。

公开(公告)号：US20060091437A1

公开(公告)日：2006-05-04

申请号：US11240570

申请日：2005-10-03

申请人： Seung-bum Hong ,  Ju-hwan Jung ,  Hyoung-soo Ko ,  Hong-sik Park ,  Dong-ki Min ,  Eun-sik Kim ,  Chul-min Park ,  Sung-dong Kim ,  Kyoung-lock Baeck

发明人： Seung-bum Hong ,  Ju-hwan Jung ,  Hyoung-soo Ko ,  Hong-sik Park ,  Dong-ki Min ,  Eun-sik Kim ,  Chul-min Park ,  Sung-dong Kim ,  Kyoung-lock Baeck

IPC分类号： H01L29/94

CPC分类号： H01L27/101 ,  B82Y10/00 ,  G11B9/02 ,  G11C11/22

摘要： Provided are a resistive memory device having a probe array and a method of manufacturing the same. The resistive memory device includes a memory part having a bottom electrode and a ferroelectric layer sequentially formed on a first substrate; a probe part having an array of resistive probes arranged on a second substrate, with the tips of the resistive probes facing the ferroelectric layer so as to write and read data on the ferroelectric layer; and a binding layer which grabs and fixes the resistive probes on or above the ferroelectric layer. The method of manufacturing the resistive memory device includes forming a bottom electrode and a ferroelectric layer sequentially on a first substrate; forming an array of resistive probes on a second substrate; and wafer level bonding the first substrate to the second substrate using a binding layer such that tips of the resistive probes face the ferroelectric layer.

摘要翻译： 提供了具有探针阵列的电阻式存储器件及其制造方法。 电阻式存储器件包括一个存储器部分，其具有顺序地形成在第一衬底上的底部电极和铁电层; 探针部分，其具有布置在第二基板上的电阻式探针阵列，其中所述电阻式探针的尖端面对强电介质层，以便在铁电层上写入和读取数据; 以及在铁电层上或上方抓住并固定电阻式探头的结合层。 制造电阻式存储器件的方法包括在第一衬底上依次形成底电极和铁电层; 在第二衬底上形成电阻性探针阵列; 并且使用结合层将第一衬底与第二衬底结合到晶片级，使得电阻探针的尖端面对强电介质层。

公开(公告)号：US20060145806A1

公开(公告)日：2006-07-06

申请号：US11320898

申请日：2005-12-30

申请人： Sung-dong Kim ,  Eun-sik Kim ,  Ju-hwan Jung ,  Hyoung-soo Ko ,  Dong-ki Min ,  Hong-sik Park ,  Seung-bum Hong

发明人： Sung-dong Kim ,  Eun-sik Kim ,  Ju-hwan Jung ,  Hyoung-soo Ko ,  Dong-ki Min ,  Hong-sik Park ,  Seung-bum Hong

IPC分类号： H01F5/00

CPC分类号： H03K19/16 ,  H01L43/08

摘要： A magnetic logic device (MLD) and methods of manufacturing and operating an MLD are provided. The MLD includes: a first interconnection; a lower magnetic layer formed on the first interconnection, the lower magnetic layer having a magnetization direction fixed in a predetermined direction; a non-magnetic layer formed on the lower magnetic layer; an upper magnetic layer formed on the non-magnetic layer, the upper magnetic layer having a magnetization direction parallel or anti-parallel to the magnetization direction of the lower magnetic layer; and a second interconnection formed on the upper magnetic layer. A first current source is disposed between one end of the first interconnection and one end of the second interconnection and a second current source is disposed between the other end of the first interconnection and the other end of the second interconnection.

公开(公告)号：US07889628B2

公开(公告)日：2011-02-15

申请号：US12128788

申请日：2008-05-29

申请人： Hyoung-soo Ko ,  Eun-sik Kim ,  Sung-dong Kim ,  Ju-hwan Jung ,  Hong-sik Park ,  Chul-min Park ,  Seung-bum Hong

发明人： Hyoung-soo Ko ,  Eun-sik Kim ,  Sung-dong Kim ,  Ju-hwan Jung ,  Hong-sik Park ,  Chul-min Park ,  Seung-bum Hong

IPC分类号： G11B7/00

CPC分类号： G11B9/02 ,  G11C11/5657 ,  Y10S977/947

摘要： A ferroelectric recording medium and a writing method for the same are provided. The ferroelectric recording medium includes a ferroelectric layer which reverses its polarization when receiving a predetermined coercive voltage. A nonvolatile anisotrophic conduction layer is formed on the ferroelectric layer. A resistance of the anisotrophic conduction layer decreases when receiving a first voltage lower than the coercive voltage, and the resistance of the anisotrophic conduction layer increases when receiving a second voltage higher than the coercive voltage. Multi-bit information is stored by a combination of polarization states of the ferroelectric layer and the resistance of the anisotrophic conduction layer. Accordingly, multiple bits can be expressed on one domain of the ferroelectric recording medium.

摘要翻译： 提供铁电记录介质及其写入方法。 铁电记录介质包括在接收预定的矫顽电压时反转其极化的铁电层。 在铁电层上形成非挥发性各向异性导电层。 当接收到低于矫顽电压的第一电压时，各向异性传导层的电阻降低，并且当接收到高于矫顽电压的第二电压时，各向异性导电层的电阻增加。 通过铁电层的极化状态和各向异性导电层的电阻的组合来存储多位信息。 因此，可以在铁电记录介质的一个域上表示多个位。

公开(公告)号：US07820311B2

公开(公告)日：2010-10-26

申请号：US11348485

申请日：2006-02-07

申请人： Hyoung-soo Ko ,  Eun-sik Kim ,  Sung-dong Kim ,  Ju-hwan Jung ,  Hong-sik Park ,  Chul-min Park ,  Seung-bum Hong

发明人： Hyoung-soo Ko ,  Eun-sik Kim ,  Sung-dong Kim ,  Ju-hwan Jung ,  Hong-sik Park ,  Chul-min Park ,  Seung-bum Hong

IPC分类号： G11B5/64

CPC分类号： G11B9/02 ,  G11C11/5657 ,  Y10S977/947

摘要： A ferroelectric recording medium and a writing method for the same are provided. The ferroelectric recording medium includes a ferroelectric layer which reverses its polarization when receiving a predetermined coercive voltage. A nonvolatile anisotrophic conduction layer is formed on the ferroelectric layer. A resistance of the anisotrophic conduction layer decreases when receiving a first voltage lower than the coercive voltage, and the resistance of the anisotrophic conduction layer increases when receiving a second voltage higher than the coercive voltage. Multi-bit information is stored by a combination of polarization states of the ferroelectric layer and the resistance of the anisotrophic conduction layer. Accordingly, multiple bits can be expressed on one domain of the ferroelectric recording medium.

摘要翻译： 提供铁电记录介质及其写入方法。 铁电记录介质包括在接收预定的矫顽电压时反转其极化的铁电层。 在铁电层上形成非挥发性各向异性导电层。 当接收到低于矫顽电压的第一电压时，各向异性传导层的电阻降低，并且当接收到高于矫顽电压的第二电压时，各向异性导电层的电阻增加。 通过铁电层的极化状态和各向异性导电层的电阻的组合来存储多位信息。 因此，可以在铁电记录介质的一个域上表示多个位。

公开(公告)号：US20060175644A1

公开(公告)日：2006-08-10

申请号：US11348485

申请日：2006-02-07

申请人： Hyoung-soo Ko ,  Eun-sik Kim ,  Sung-dong Kim ,  Ju-hwan Jung ,  Hong-sik Park ,  Chul-min Park ,  Seung-bum Hong

发明人： Hyoung-soo Ko ,  Eun-sik Kim ,  Sung-dong Kim ,  Ju-hwan Jung ,  Hong-sik Park ,  Chul-min Park ,  Seung-bum Hong

IPC分类号： H01L29/94

CPC分类号： G11B9/02 ,  G11C11/5657 ,  Y10S977/947

摘要： A ferroelectric recording medium and a writing method for the same are provided. The ferroelectric recording medium includes a ferroelectric layer which reverses its polarization when receiving a predetermined coercive voltage. A nonvolatile anisotrophic conduction layer is formed on the ferroelectric layer. A resistance of the anisotrophic conduction layer decreases when receiving a first voltage lower than the coercive voltage, and the resistance of the anisotrophic conduction layer increases when receiving a second voltage higher than the coercive voltage. Multi-bit information is stored by a combination of polarization states of the ferroelectric layer and the resistance of the anisotrophic conduction layer. Accordingly, multiple bits can be expressed on one domain of the ferroelectric recording medium.

摘要翻译： 提供铁电记录介质及其写入方法。 铁电记录介质包括在接收预定的矫顽电压时反转其极化的铁电层。 在铁电层上形成非挥发性各向异性导电层。 当接收到低于矫顽电压的第一电压时，各向异性传导层的电阻降低，并且当接收到高于矫顽电压的第二电压时，各向异性导电层的电阻增加。 通过铁电层的极化状态和各向异性导电层的电阻的组合来存储多位信息。 因此，可以在铁电记录介质的一个域上表示多个位。

公开(公告)号：US20080030909A1

公开(公告)日：2008-02-07

申请号：US11723567

申请日：2007-03-21

申请人： Hyoung-soo Ko ,  Ju-hwan Jung ,  Yong-su Kim ,  Seung-bum Hong ,  Hong-sik Park

发明人： Hyoung-soo Ko ,  Ju-hwan Jung ,  Yong-su Kim ,  Seung-bum Hong ,  Hong-sik Park

IPC分类号： G11B5/33 ,  G11B5/127 ,  G11B5/82

CPC分类号： G11B9/02 ,  Y10T29/49032

摘要： An electric field read/write head, a method of manufacturing the same, and a data read/write device including the electric field read/write head are provided. The data read/write device includes an electric field read/write head which reads and writes data to and from a recording medium. The electric field read/write head includes a semiconductor substrate, a resistance region, source and drain regions, and a write electrode. The semiconductor substrate includes a first surface and a second surface with adjoining edges. The resistance region is formed to extend from a central portion at one end of the first surface to the second surface. The source region and the drain region are formed at either side of the resistance region and are separated from the first surface. The write electrode is formed on the resistance region with an insulating layer interposed between the write electrode and the resistance region.

摘要翻译： 提供电场读/写头，其制造方法以及包括电场读/写头的数据读/写装置。 数据读/写装置包括从记录介质读取和写入数据的电场读/写头。 电场读/写头包括半导体衬底，电阻区，源极和漏极区以及写入电极。 半导体衬底包括具有相邻边缘的第一表面和第二表面。 电阻区域形成为从第一表面的一端的中心部分延伸到第二表面。 源极区域和漏极区域形成在电阻区域的两侧并且与第一表面分离。 写电极形成在电阻区上，绝缘层位于写电极和电阻区之间。

公开(公告)号：US07733761B2

公开(公告)日：2010-06-08

申请号：US11261612

申请日：2005-10-31

申请人： Hyoung-soo Ko ,  Ju-hwan Jung ,  Seung-bum Hong ,  Hong-sik Park ,  Chul-min Park ,  Kyoung-lock Baeck

发明人： Hyoung-soo Ko ,  Ju-hwan Jung ,  Seung-bum Hong ,  Hong-sik Park ,  Chul-min Park ,  Kyoung-lock Baeck

IPC分类号： G11B7/00

CPC分类号： B82Y10/00 ,  G11B9/02 ,  G11B9/1409 ,  G11B9/1472

摘要： Provided is a ferroelectric recording medium including a ferroelectric recording layer formed of a polarization reversal ferroelectric material and an anisotropic conduction layer that covers the ferroelectric recording layer and changes into a conductor or a non-conductor based on external energy.

摘要翻译： 本发明提供一种铁电记录介质，其特征在于，具备由极化反转铁电材料形成的铁电体记录层和覆盖所述强电介质层的各向异性导电层，并且能够基于外部能量而变为导体或非导体。

公开(公告)号：US07319224B2

公开(公告)日：2008-01-15

申请号：US11219732

申请日：2005-09-07

申请人： Hong-sik Park ,  Kyoung-lock Baeck ,  Ju-hwan Jung ,  Hyoung-soo Ko ,  Chul-min Park ,  Seung-bum Hong

发明人： Hong-sik Park ,  Kyoung-lock Baeck ,  Ju-hwan Jung ,  Hyoung-soo Ko ,  Chul-min Park ,  Seung-bum Hong

IPC分类号： G21K7/00

CPC分类号： G11B9/1409 ,  G01Q60/30 ,  Y10S977/875 ,  Y10S977/878 ,  Y10S977/879

摘要： Provided are a semiconductor probe with a resistive tip, and a method of fabricating the semiconductor probe. The method includes forming a stripe-shaped mask layer on a substrate doped with a first impurity, and forming first and second electrode regions by heavily doping portions of the substrate not covered by the mask layer with a second impurity opposite in polarity to the first impurity; annealing the substrate to decrease a gap between the first and second semiconductor electrode regions, and forming resistive regions lightly doped with the second impurity at portions contiguous with the first and second semiconductor electrode regions; forming a stripe-shaped first photoresist orthogonal to the mask layer, and etching the mask layer such that the mask layer has a square shape; forming a second photoresist on the substrate to cover a portion of the first photoresist and define a cantilever region; forming the cantilever region by etching portions not covered by the first and second photoresists; and removing the first and second photoresists, and forming a resistive tip having a semi-quadrangular pyramidal shape by etching portions of the substrate not covered by the mask layer.

摘要翻译： 提供具有电阻尖端的半导体探针和制造半导体探针的方法。 该方法包括在掺杂有第一杂质的衬底上形成条形掩模层，以及通过以与第一杂质极性相反的第二杂质重掺杂未被掩模层覆盖的衬底的部分来形成第一和第二电极区 ; 退火所述衬底以减小所述第一和第二半导体电极区之间的间隙，以及在与所述第一和第二半导体电极区相邻的部分形成轻掺杂有所述第二杂质的电阻区; 形成与所述掩模层正交的条状的第一光致抗蚀剂，并且蚀刻所述掩模层，使得所述掩模层具有正方形形状; 在所述基板上形成第二光致抗蚀剂以覆盖所述第一光致抗蚀剂的一部分并限定悬臂区域; 通过蚀刻未被第一和第二光致抗蚀剂覆盖的部分形成悬臂区域; 以及去除所述第一和第二光致抗蚀剂，以及通过蚀刻未被所述掩模层覆盖的所述衬底的部分，形成具有半四棱锥形形状的电阻尖端。