公开(公告)号：US5815528A

公开(公告)日：1998-09-29

申请号：US505959

申请日：1995-07-24

申请人： Susumu Koga ,  Hidetoshi Takano ,  Noriyuki Takao ,  Kiyoshi Mizuno ,  Goro Kobayashi

发明人： Susumu Koga ,  Hidetoshi Takano ,  Noriyuki Takao ,  Kiyoshi Mizuno ,  Goro Kobayashi

IPC分类号： H04L5/18 ,  H04L5/16 ,  H04L12/40 ,  H04L12/44 ,  H04L25/02 ,  H04L25/52 ,  H04B3/02 ,  G06F13/362

CPC分类号： H04L12/44 ,  H04L12/40019

摘要： Preventing signals from undesirably entering and enabling interactive communication. Signals from a main line or branch line are received by receiving circuits. Signal detecting circuits detect signals, and then transmit the detected signals (detection B and detection A) to a first-arrival judging circuit. The first-arrival judging circuit determines which signal is the first arrival between the signals from the detecting circuits, and then allows one of transmitting circuits to output a signal. Accordingly, only one of the transmitting circuits generates signals, preventing signals of the other transmitting circuit from entering and enabling interactive communication.

摘要翻译： 防止信号不期望地进入并实现交互式通信。 来自主线或分支线的信号由接收电路接收。 信号检测电路检测信号，然后将检测到的信号（检测B和检测A）发送到第一到达判断电路。 第一到达判断电路确定哪个信号是来自检测电路的信号之间的首次到达，然后允许发送电路中的一个输出信号。 因此，只有一个发送电路产生信号，防止另一个发送电路的信号进入和实现交互式通信。

公开(公告)号：US5724029A

公开(公告)日：1998-03-03

申请号：US544211

申请日：1995-10-17

申请人： Noriyuki Takao ,  Hidetoshi Takano ,  Sakae Ito ,  Naoki Okamura

发明人： Noriyuki Takao ,  Hidetoshi Takano ,  Sakae Ito ,  Naoki Okamura

IPC分类号： H04L12/56 ,  H04L29/06

CPC分类号： H04L29/06 ,  H04L49/90

摘要： A communication control section is provided with a plurality of receiving channels (RXDA1 and RXDA2). An address separated by an address separating section constituting the RXDA1 is compared with a reference address denoting a token, and if the separated address corresponds thereto, an interruption is requested by an interruption processing section. An address separated by an address separating section constituting the RXDA2 is compared with a reference address denoting the station number of that particular station, and if the separated address corresponds thereto, the interruption is similarly requested. When the interruption has been requested, the processing of a CPU transfers from the processing of a main routine by a main routine processing section to an interruption processing by an interruption processing section.

摘要翻译： 通信控制部分具有多个接收通道（RXDA1和RXDA2）。 将由构成RXDA1的地址分隔部分分隔的地址与表示令牌的参考地址进行比较，如果分离的地址与其对应，则由中断处理部请求中断。 将由构成RXDA2的地址分隔部分分隔的地址与表示该特定站的站号的参考地址进行比较，如果分离的地址与其对应，则类似地要求中断。 当请求中断时，CPU的处理从主程序处理部分的主程序的处理转移到中断处理部分的中断处理。

公开(公告)号：US5671393A

公开(公告)日：1997-09-23

申请号：US717149

申请日：1996-09-20

申请人： Norihiro Yamaki ,  Noriyuki Takao ,  Hidetoshi Takano

发明人： Norihiro Yamaki ,  Noriyuki Takao ,  Hidetoshi Takano

IPC分类号： G06F15/16 ,  G06F13/18 ,  G06F15/177 ,  G06F13/16

CPC分类号： G06F13/18

摘要： A shared memory system and an arbitrating method and system. When the processing is distributed over a plurality of CPUs (e.g., CPUA and CPUB) and if it is desired that a shared memory is used to transfer data between the CPUs, a clock CKG indicating the CPUA access timing clock is generated. A gate signal G indicating the access right to the shared memory is generated in synchronism with the clock CKG. When either of the CPUs requests the access to the shared memory, it makes the corresponding chip select signal CSA.sup.- or CSB.sup.- L-level. The access right is always directed to the CPUA and switched to the CPUB in response to the access demand from the CPUB. After one access has completed, the CPUB makes CSB.sup.- H-level. Thus, the access right is switched to the CPUA. After one access has terminated, the CPUA makes CSA.sup.- H-level. If the CPUB requests the access at this time, the access right is switched to the CPUB. If the CPUB does not request the access, the access right is maintained at the CPUA. The CPUA and CPUB are synchronized with each other through a wait signal WAITA.sup.-. When the shared memory is to be accessed, no software is required. The speed of data transfer can be increased and the loads on the CPUs will not influence each other.

摘要翻译： 共享内存系统和仲裁方法和系统。 当处理分布在多个CPU（例如，CPUA和CPUB）上时，并且如果希望使用共享存储器在CPU之间传送数据，则生成指示CPUA访问定时时钟的时钟CKG。 与时钟CKG同步地产生指示到共享存储器的访问权限的门信号G. 当任一CPU请求访问共享存储器时，它使相应的芯片选择信号CSA或CSB-L级。 访问权限始终指向CPUA，并根据CPUB的访问需求切换到CPUB。 一次访问完成后，CPUB使CSB-H级。 因此，访问权限切换到CPUA。 一个访问终止后，CPUA使CSA-H级。 如果CPUB此时请求访问，则访问权限被切换到CPUB。 如果CPUB不请求访问，则CPUA将维护访问权限。 CPUA和CPUB通过等待信号WAITA-彼此同步。 当共享存储器被访问时，不需要软件。 可以提高数据传输的速度，并且CPU上的负载不会相互影响。

公开(公告)号：US5774657A

公开(公告)日：1998-06-30

申请号：US713572

申请日：1996-09-16

申请人： Naoki Okamura ,  Noriyuki Takao ,  Hidetoshi Takano

发明人： Naoki Okamura ,  Noriyuki Takao ,  Hidetoshi Takano

IPC分类号： G06F13/00 ,  H04L29/06 ,  H04L29/08 ,  G06F13/42

CPC分类号： H04L49/9047 ,  H04L29/06 ,  H04L49/90 ,  H04L49/901 ,  H04L69/32

摘要： A communication data processor. Data received from a communication channel is stored in a data area. A list area corresponding to the data area in which the communication data has been stored is deleted from a vacant list management area and then added to a logical check list management area. A list area corresponding to a data area logically checked by a lower layer logical check section is deleted from the logical check list management area and then added to a higher layer protocol classification list management area. A list area corresponding to a data area classified by a higher layer protocol classification section is deleted from the higher layer protocol classification list management area and then added to the vacant list management area. When data relating to a protocol having an OSI model is to be processed, it is not required to perform the transfer of real data in a data storage.

摘要翻译： 通信数据处理器。 从通信信道接收的数据被存储在数据区域中。 从空闲列表管理区域删除与已经存储了通信数据的数据区域对应的列表区域，然后将其添加到逻辑检查列表管理区域。 从逻辑检查列表管理区域删除与下层逻辑检查部分逻辑检查的数据区域对应的列表区域，然后将其添加到上层协议分类列表管理区域。 从较高层协议分类列表管理区域删除与由较高层协议分类部分分类的数据区域对应的列表区域，然后添加到空白列表管理区域。 当要处理与具有OSI模型的协议相关的数据时，不需要在数据存储器中执行实际数据的传送。

公开(公告)号：US5640400A

公开(公告)日：1997-06-17

申请号：US607649

申请日：1996-02-27

申请人： Ryoichi Sato ,  Hirofumi Kita ,  Kouiti Matuo ,  Masahiko Tsukamoto ,  Ikuya Suwa ,  Hideto Naraki ,  Noriyuki Takao ,  Hidetoshi Takano

发明人： Ryoichi Sato ,  Hirofumi Kita ,  Kouiti Matuo ,  Masahiko Tsukamoto ,  Ikuya Suwa ,  Hideto Naraki ,  Noriyuki Takao ,  Hidetoshi Takano

IPC分类号： H04L29/06 ,  G05B19/418 ,  H04L12/28 ,  H04L12/46 ,  H04L29/14 ,  H04J3/02 ,  H04L15/56

CPC分类号： G05B19/4186 ,  H04L12/4625 ,  Y02P90/18 ,  Y02P90/185

摘要： A gateway as one example of a mutual connecting appraratus between networks virtually provides an address of a mini manufacturing automation protocol (miniMAP) device to a mechatronics network (ME-NET) device in plural devices forming a network so that the miniMAP device uniquely identifies the ME-NET device. These plural devices connected to respective networks can mutually transmit and receive data in a network environment in which the ME-NET device is connected to the miniMAP device or another ME-NET device. Conversely, an address of the ME-NET device may be virtually provided to the miniMAP device so that the ME-NET device uniquely identifies the miniMAP device. Further, for example, the plural devices may be constructed by ME-NET devices. In this case, one ME-NET device uniquely identifies another ME-NET device in the plural ME-NET devices by virtually providing a station address unused in this one ME-NET device to this another ME-NET device.

摘要翻译： 作为网络之间的相互连接设备的一个示例的网关实际上将微型制造自动化协议（miniMAP）设备的地址提供给形成网络的多个设备中的机电一体化网络（ME-NET）设备，使得miniMAP设备唯一地识别 ME-NET设备。 连接到各个网络的这些多个设备可以在ME-NET设备连接到miniMAP设备或另一个ME-NET设备的网络环境中相互发送和接收数据。 相反，ME-NET设备的地址可以虚拟地提供给miniMAP设备，使得ME-NET设备唯一地识别miniMAP设备。 此外，例如，多个装置可以由ME-NET装置构成。 在这种情况下，一个ME-NET设备通过在该一个ME-NET设备中虚拟地提供未使用的站地址来唯一地识别多个ME-NET设备中的另一ME-NET设备。

公开(公告)号：US5600796A

公开(公告)日：1997-02-04

申请号：US247207

申请日：1994-05-20

申请人： Naoki Okamura ,  Noriyuki Takao ,  Hidetoshi Takano

发明人： Naoki Okamura ,  Noriyuki Takao ,  Hidetoshi Takano

IPC分类号： H04L12/417 ,  G06F7/00 ,  G06F15/00

CPC分类号： H04L12/417

摘要： A communication network is comprised of several stations that constitute a logical ring to transmit and receive information. The logical ring is established and maintained by a token passing process and a solicit process. The token represents the right to transmit information between the stations in the logical ring. The solicit process solicits stations that are not in the logical ring. The stations in the network include at least one particular station. Each of the stations as well as the particular station include soliciting capability for carrying out the solicit process when holding a token. In addition, each station except for the particular station also includes first solicit repeat capability for repeating the solicit process at most a predetermined number of times when no frame arrives from other stations in the network, and the function of moving to an idle state when no frames arrives from other stations after the solicit process is repeated. The particular station further includes second solicit repeat capability for repeating the solicit process when no frame arrives from any station in the network in response to the solicit process executed by the particular station, and token producing capability for producing the token when no other station joins in the logical ring.

摘要翻译： 通信网络由构成用于发送和接收信息的逻辑环的几个站组成。 逻辑环由令牌传递过程和请求过程建立和维护。 令牌表示在逻辑环中的站之间传送信息的权利。 征求过程请求不属于逻辑环的站。 网络中的站包括至少一个特定站。 每个站和特定站包括在持有令牌时执行请求过程的请求能力。 此外，除了特定站之外的每个站还包括用于在没有帧从网络中的其他站到达的情况下最多预定次数重复请求过程的第一请求重复能力，以及当没有帧到达空闲状态时的功能 在请求过程重复后，帧从其他站到达。 特定站还包括第二请求重复能力，用于当没有帧响应于特定站执行的请求过程而从网络中的任何站到达时重复请求进程，以及用于在没有其他站加入时产生令牌的令牌生成能力 逻辑环。