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公开(公告)号：US11177304B2
公开(公告)日：2021-11-16
申请号：US16728568
申请日：2019-12-27
发明人： Yun-Wei Cheng , Chun-Hao Chou , Kuo-Cheng Lee , Hsun-Ying Huang
IPC分类号： H01L27/00 , H01J40/14 , H01L27/146
摘要： A method for forming a light-sensing device is provided. The method includes forming a light-sensing region in a semiconductor substrate. The semiconductor substrate has a front surface and a light-receiving surface opposite to the front surface. The method also includes forming a first dielectric layer over the front surface and forming a second dielectric layer over the first dielectric layer. The second dielectric layer has a different refractive index than that of the first dielectric layer, and the first dielectric layer and the second dielectric layer together form a (or a part of a) light-reflective element. The method further includes partially removing the first dielectric layer and the second dielectric layer to form a contact opening. In addition, the method includes forming a conductive contact to partially (or completely) fill the contact opening.
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公开(公告)号：US11140309B2
公开(公告)日：2021-10-05
申请号：US16699752
申请日：2019-12-02
发明人： Yun-Wei Cheng , Chun-Hao Chou , Hsin-Chi Chen , Kuo-Cheng Lee , Hsun-Ying Huang
IPC分类号： H04N5/232 , H04N5/369 , H01L27/146 , H04N9/04
摘要： An image sensor including a semiconductor substrate, a plurality of color filters, a plurality of first lenses and a second lens is provided. The semiconductor substrate includes a plurality of sensing pixels arranged in array, and each of the plurality of sensing pixels respectively includes a plurality of image sensing units and a plurality of phase detection units. The color filters at least cover the plurality of image sensing units. The first lenses are disposed on the plurality of color filters. Each of the plurality of first lenses respectively covers one of the plurality of image sensing units. The second lens is disposed on the plurality of color filters and the second lens covers the plurality of phase detection units.
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公开(公告)号：US10680027B2
公开(公告)日：2020-06-09
申请号：US16395803
申请日：2019-04-26
发明人： Min-Feng Kao , Dun-Nian Yaung , Jen-Cheng Liu , Hsun-Ying Huang
IPC分类号： H01L31/062 , H01L27/146 , H01L23/48
摘要： A semiconductor device structure is provided. The semiconductor device structure includes a first semiconductor die, and a second semiconductor die bonded on the first semiconductor die. A through-substrate via penetrates through a semiconductor substrate of the second semiconductor die. A passivation layer is disposed between the first semiconductor die and the second semiconductor die, wherein the passivation layer is directly bonded to the semiconductor substrate of the second semiconductor die. A conductive feature passes through the passivation layer, wherein the conductive feature is bonded to the through-substrate via. A barrier layer is disposed between the conductive feature and the passivation layer. The barrier layer covers sidewalls of the conductive feature and separates the surface of the conductive feature from a nearest neighboring surface of the first or second semiconductor die.
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4.发明申请公开(公告)号：US20200161244A1
公开(公告)日：2020-05-21
申请号：US16710271
申请日：2019-12-11
发明人： Min-Feng Kao , Dun-Nian Yaung , Jen-Cheng Liu , Hsun-Ying Huang
IPC分类号： H01L23/538 , H01L23/528 , H01L23/31 , H01L21/768 , H01L21/683 , H01L23/00 , H01L23/522 , H01L23/48
摘要： In some embodiments, the present disclosure relates to an integrated chip. The integrated chip includes a first plurality of interconnect layers within a first inter-level dielectric (ILD) structure disposed along a front-side of a first substrate. A conductive pad is arranged along a back-side of the first substrate and a first through-substrate-via (TSV) extends between an interconnect wire of the first plurality of interconnect layers and the conductive pad. A second plurality of interconnect layers are within a second ILD structure disposed along a front-side of a second substrate that is bonded to the first substrate. A second through substrate via (TSV) extends through the second substrate. The second TSV has a greater width than the first TSV.
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公开(公告)号：US20200058689A1
公开(公告)日：2020-02-20
申请号：US16662453
申请日：2019-10-24
发明人： Chia-Yu Wei , Hsin-Chi Chen , Kuo-Cheng Lee , Ping-Hao Lin , Hsun-Ying Huang , Yen-Liang Lin , Yu Ting Kao
IPC分类号： H01L27/146
摘要： The present disclosure relates to a CMOS image sensor, and an associated method of formation. In some embodiments, the CMOS image sensor comprises a floating diffusion region disposed at one side of a transfer gate within a substrate and a photo detecting column disposed at the other side of the transfer gate opposing to the floating diffusion region within the substrate. The photo detecting column comprises a doped sensing layer with a doping type opposite to that of the substrate. The photo detecting column and the substrate are in contact with each other at a junction interface comprising one or more recessed portions. By forming the junction interface with recessed portions, the junction interface is enlarged compared to a previous p-n junction interface without recessed portions, and thus a full well capacity of the photodiode structure is improved.
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公开(公告)号：US10535698B2
公开(公告)日：2020-01-14
申请号：US15907654
申请日：2018-02-28
IPC分类号： H01L27/146
摘要： The present disclosure relates to an image sensor with a pad structure formed during a front-end-of-line process. The pad structure can be formed prior to formation of back side deep trench isolation structures and metal grid structures. An opening is formed on a back side of the image sensor device to expose the embedded pad structure and to form electrical connections.
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公开(公告)号：US10522580B2
公开(公告)日：2019-12-31
申请号：US15683900
申请日：2017-08-23
发明人： Yun-Wei Cheng , Chun-Hao Chou , Kuo-Cheng Lee , Hsun-Ying Huang
IPC分类号： H01L27/146 , H01L31/18
摘要： Structures and formation methods of a light-sensing device are provided. The light-sensing device includes a semiconductor substrate and a light-sensing region in the semiconductor substrate. The light-sensing device also includes a light-reflective element over the semiconductor substrate. The light-sensing region is between the light-reflective element and a light-receiving surface of the semiconductor substrate. The light-reflective element includes a stack of multiple pairs of dielectric layers. Each of the pairs has a first dielectric layer and a second dielectric layer, and the first dielectric layer has a different refractive index than that of the second dielectric layer.
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公开(公告)号：US10147682B2
公开(公告)日：2018-12-04
申请号：US15143950
申请日：2016-05-02
发明人： Min-Feng Kao , Dun-Nian Yaung , Jen-Cheng Liu , Hsun-Ying Huang
IPC分类号： H01L23/48 , H01L23/538 , H01L21/768 , H01L23/31 , H01L23/528 , H01L23/522 , H01L21/683 , H01L23/00 , H01L23/525
摘要： In some embodiments, the present disclosure relates to an integrated chip (IC) having a back-side through-silicon-via (BTSV) with a direct physical connection between a metal interconnect layer and a back-side conductive bond pad. The IC has metal interconnect layers arranged within an inter-level dielectric structure disposed onto a front-side of a substrate. A dielectric layer is arranged along a back-side of the substrate, and a conductive bond pad is arranged over the dielectric layer. A BTSV extends from one of the metal interconnect layers through the substrate and the dielectric layer to the conductive bond pad. A conductive bump is arranged onto the conductive bond pad, which has a substantially planar lower surface extending from over the BTSV to below the conductive bump. Directly connecting the conductive bond pad to the BTSV reduces a size of the conductive bond thereby improving a routing capability of the conductive bond pad.
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公开(公告)号：US09923011B2
公开(公告)日：2018-03-20
申请号：US14993748
申请日：2016-01-12
发明人： Min-Feng Kao , Dun-Nian Yaung , Jen-Cheng Liu , Hsun-Ying Huang
IPC分类号： H01L27/146 , H01L23/48
CPC分类号： H01L27/14634 , H01L23/481 , H01L27/14636 , H01L2224/11
摘要： A semiconductor device structure is provided. The semiconductor device structure includes a first semiconductor die and a second semiconductor die. The semiconductor device structure also includes a passivation layer between the first semiconductor die and the second semiconductor die, and the passivation layer is directly bonded to a second interlayer dielectric layer of the second semiconductor die. The semiconductor device structure further includes a conductive feature in via hole and directly bonded to a second conductive line of the second semiconductor die. The semiconductor device structure further includes a second barrier layer between the conductive feature and the passivation layer. The second barrier layer covers sidewalls of the conductive feature and a surface of the conductive feature closer to the first semiconductor die.
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公开(公告)号：US11152417B2
公开(公告)日：2021-10-19
申请号：US16055758
申请日：2018-08-06
发明人： Chia-Yu Wei , Cheng-Yuan Li , Hsin-Chi Chen , Kuo-Cheng Lee , Hsun-Ying Huang , Yen-Liang Lin
IPC分类号： H01L27/146
摘要： The present disclosure is directed to anchor structures and methods for forming anchor structures such that planarization and wafer bonding can be uniform. Anchor structures can include anchor layers formed on a dielectric layer surface and anchor pads formed in the anchor layer and on the dielectric layer surface. The anchor layer material can be selected such that the planarization selectivity of the anchor layer, anchor pads, and the interconnection material can be substantially the same as one another. Anchor pads can provide uniform density of structures that have the same or similar material.
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