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公开(公告)号:US20240363417A1
公开(公告)日:2024-10-31
申请号:US18768844
申请日:2024-07-10
发明人: Mrunal Abhijith KHADERBAD , Sathaiya Mahaveer DHANYAKUMAR , Huicheng CHANG , Keng-Chu LIN , Winnie Victoria Wei-Ning CHEN
IPC分类号: H01L21/822 , H01L21/8234 , H01L27/092
CPC分类号: H01L21/8221 , H01L21/823418 , H01L21/823481 , H01L27/092
摘要: A semiconductor device includes a first transistor device of a first type. The first transistor includes first nanostructures, a first pair of source/drain structures, and a first gate electrode on the first nanostructures. The semiconductor device also includes a second transistor device of a second type formed over the first transistor device. The second transistor device includes second nanostructures over the first nanostructures, a second pair of source/drain structures over the first pair or source/drain structures, and a second gate electrode on the second nanostructures and over the first nanostructures. The semiconductor device also includes a first isolation structure between the first and second nanostructures. The semiconductor device further includes a second isolation structure in contact with a top surface of the first pair of source/drain structures. The semiconductor device also includes a seed layer between the second isolation structure and the second pair of source/drain structures.
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2.
公开(公告)号:US20230009745A1
公开(公告)日:2023-01-12
申请号:US17370265
申请日:2021-07-08
IPC分类号: H01L29/66 , H01L29/06 , H01L29/423 , H01L29/49 , H01L29/786 , H01L21/02
摘要: A semiconductor device includes a semiconductor feature, a low-k dielectric feature that is formed on the semiconductor feature, and a Si-containing layer that contains elements of silicon and that covers over the low-k dielectric feature. The Si-containing layer can prevent the low-k dielectric feature from being damaged in etch and/or annealing processes for manufacturing the semiconductor device.
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公开(公告)号:US20230030411A1
公开(公告)日:2023-02-02
申请号:US17967499
申请日:2022-10-17
发明人: Chia-Hung CHU , Sung-Li WANG , Fang-Wei LEE , Jung-Hao CHANG , Mrunal Abhijith KHADERBAD , Keng-Chu LIN
IPC分类号: H01L29/78 , H01L29/66 , H01L21/311 , H01L21/8234 , H01L29/417 , H01L29/45 , H01L29/08 , H01L21/762 , H01L21/3065 , H01L21/3105 , H01L21/308 , H01L21/027 , H01L21/3213
摘要: A fin field effect transistor device structure includes a fin structure formed over a substrate. The fin field effect transistor device structure also includes a source/drain epitaxial structure formed over the fin structure. The fin field effect transistor device structure also includes a contact structure with a concave top surface formed over the source/drain epitaxial structure. The fin field effect transistor device structure also includes a barrier layer conformally wrapped around the contact structure. The fin field effect transistor device structure also includes a via structure formed over the contact structure. The concave top surface of the contact structure is below the top surface of the barrier layer.
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公开(公告)号:US20240170323A1
公开(公告)日:2024-05-23
申请号:US18427575
申请日:2024-01-30
发明人: Mrunal Abhijith KHADERBAD , Ko-Feng Chen , Zheng-Yong Liang , Chen-Han Wang , De-Yang Chiou , Yu-Yun Peng , Keng-Chu Lin
IPC分类号: H01L21/762 , H01L21/311 , H01L21/8234
CPC分类号: H01L21/76224 , H01L21/31116 , H01L21/823481
摘要: The present disclosure describes a method of forming low thermal budget dielectrics in semiconductor devices. The method includes forming, on a substrate, first and second fin structures with an opening in between, filling the opening with a flowable isolation material, treating the flowable isolation material with a plasma, and removing a portion of the plasma-treated flowable isolation material between the first and second fin structures
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5.
公开(公告)号:US20230282715A1
公开(公告)日:2023-09-07
申请号:US17685517
申请日:2022-03-03
IPC分类号: H01L29/417 , H01L27/088
CPC分类号: H01L29/41725 , H01L27/088
摘要: A semiconductor structure includes a semiconductor substrate, a first source/drain portion, a second source/drain portion, a first metal contact, a second metal contact and a first conductive carbon layer. The first and second source/drain portions are formed over the semiconductor substrate, and are spaced apart from each other. The first source/drain portion has a conductivity type different from that of the second source/drain portion. The first and second metal contacts are respectively formed on the first and second source/drain portions. The first conductive carbon layer is formed between the first source/drain portion and the first metal contact.
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