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    APPARATUS HAVING PROGRAMMABLE TAPS AND METHOD OF USING THE SAME
    2.
    发明申请
    APPARATUS HAVING PROGRAMMABLE TAPS AND METHOD OF USING THE SAME 有权
    具有可编程功能的装置及其使用方法

    公开(公告)号：US20150319017A1

    公开(公告)日：2015-11-05

    申请号：US14795043

    申请日：2015-07-09

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    发明人： Ming-Chieh HUANG ,  Jing Jing CHEN ,  Chan-Hong CHERN ,  Tao Wen CHUNG ,  Chih-Chang LIN ,  Yuwen SWEI

    IPC分类号： H04L25/03

    CPC分类号： H04L25/03057 ,  H04L2025/0349 ,  H04L2025/03566 ,  H04L2025/03617 ,  H04L2025/03687

    摘要： An apparatus includes a plurality of delay elements configured to delay a respective input signal and to output a respective delayed signal. The apparatus also includes a weight generator configured to generate a plurality of tap weights based on the delayed signals. The apparatus further includes a tap controller configured to generate tap weight enabling signals corresponding to one or more of the tap weights if the corresponding tap weights are greater than a predetermined threshold value. The tap controller is also configured to generate a set of bias factors based on corresponding tap weights of the plurality of tap weights.

    摘要翻译： 一种装置包括多个延迟元件，其被配置为延迟相应的输入信号并输出​​相应的延迟信号。 该装置还包括配置用于基于延迟信号产生多个抽头权重的权重发生器。 该装置还包括抽头控制器，其被配置为如果对应的抽头权重大于预定阈值，则生成与一个或多个抽头权重对应的抽头加权使能信号。 抽头控制器还被配置为基于多个抽头权重的相应抽头权重来生成一组偏置因子。

    INPUT/OUTPUT CIRCUIT HAVING AN INDUCTOR
    3.
    发明申请
    INPUT/OUTPUT CIRCUIT HAVING AN INDUCTOR 有权
    具有电感器的输入/输出电路

    公开(公告)号：US20140092511A1

    公开(公告)日：2014-04-03

    申请号：US14100164

    申请日：2013-12-09

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    发明人： Tao Wen CHUNG ,  Chan-Hong CHERN ,  Ming-Chieh HUANG ,  Chih-Chang LIN ,  Yuwen SWEI

    IPC分类号： H02H9/04

    CPC分类号： H02H9/04 ,  H01L23/60 ,  H01L27/0248 ,  H01L2924/0002 ,  H03F2200/294 ,  H03F2203/45638 ,  H03G1/0023 ,  H03K3/35613 ,  H03K19/018514 ,  H01L2924/00

    摘要： An input/output (I/O) circuit includes an electrostatic discharge (ESD) protection circuit electrically coupled with an output node of the I/O circuit. At least one inductor and at least one loading are electrically coupled in a series fashion and between the output node of the I/O circuit and a power line. A circuitry is electrically coupled with a node between the at least one inductor and the at least one loading. The circuitry is operable to increase a current flowing through the at least one inductor during a signal transition. The circuitry comprises at least one pre-driver stage having at least one output node, and the at least one output node of the at least one pre-driver stage is electrically coupled with at least one input node of a driver stage.

    摘要翻译： 输入/输出（I / O）电路包括与I / O电路的输出节点电耦合的静电放电（ESD）保护电路。 至少一个电感器和至少一个负载以串联方式电耦合，并且在I / O电路的输出节点和电力线之间。 电路与所述至少一个电感器和所述至少一个负载之间的节点电耦合。 电路可操作以在信号转换期间增加流过至少一个电感器的电流。 该电路包括至少一个具有至少一个输出节点的预驱动器级，并且至少一个预驱动器级的至少一个输出节点与驱动器级的至少一个输入节点电耦合。

    APPARATUS HAVING PROGRAMMABLE TAPS
    4.
    发明申请
    APPARATUS HAVING PROGRAMMABLE TAPS 有权
    具有可编程TAPS的装置

    公开(公告)号：US20150131711A1

    公开(公告)日：2015-05-14

    申请号：US14602900

    申请日：2015-01-22

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    发明人： Ming-Chieh HUANG ,  Jing Jing CHEN ,  Chan-Hong CHERN ,  Tao Wen CHUNG ,  Chih-Chang LIN ,  Yuwen SWEI

    IPC分类号： H04L25/03

    CPC分类号： H04L25/03057 ,  H04L2025/0349 ,  H04L2025/03566 ,  H04L2025/03617 ,  H04L2025/03687

    摘要： An apparatus comprises a plurality of delay elements connected in series. Each delay element is configured to delay a respective input signal and to output a respective delayed signal. The apparatus also comprises a weight generator configured to generate a plurality of tap weights based on the delayed signals. The apparatus further comprises a tap controller configured to (1) generate tap weight enabling signals corresponding to one or more of the tap weights based on a determination that the corresponding tap weights are greater than a predetermined threshold value, and (2) generate a set of bias factors. The apparatus additionally comprises a summer configured to output a weighted signal based on the delayed signals, the tap weight enabling signals, the tap weights, and the bias factors.

    摘要翻译： 一种装置包括串联连接的多个延迟元件。 每个延迟元件被配置为延迟相应的输入信号并输出​​相应的延迟信号。 该装置还包括一个权重发生器，其配置成基于延迟的信号产生多个抽头权重。 该装置还包括抽头控制器，其被配置为（1）基于对应的抽头权重大于预定阈值的确定，生成与一个或多个抽头权重相对应的抽头加权使能信号，以及（2）生成集合 的偏见因素。 该装置还包括加法器，配置为基于延迟信号，抽头加权使能信号，抽头权重和偏置因子来输出加权信号。

    CIRCUIT AND METHOD FOR INCREASING INDUCTOR CURRENT
    6.
    发明申请
    CIRCUIT AND METHOD FOR INCREASING INDUCTOR CURRENT 有权
    增加电感电流的电路和方法

    公开(公告)号：US20160072279A1

    公开(公告)日：2016-03-10

    申请号：US14943673

    申请日：2015-11-17

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    发明人： Tao Wen CHUNG ,  Chan-Hong CHERN ,  Ming-Chieh HUANG ,  Chih-Chang LIN ,  Yuwen SWEI

    IPC分类号： H02H9/04

    CPC分类号： H02H9/04 ,  H01L23/60 ,  H01L27/0248 ,  H01L2924/0002 ,  H03F2200/294 ,  H03F2203/45638 ,  H03G1/0023 ,  H03K3/35613 ,  H03K19/018514 ,  H01L2924/00

    摘要： A method of increasing a current flowing through an inductor includes receiving an input signal with a driver stage, the driver stage including the inductor coupled in series with a loading between an output node of the driver stage and a power line. In response to a transition in the input signal from a first voltage state to a second voltage state, a first current flowing through the loading and the inductor is increased. During the transition in the input signal, the current flowing through the inductor is increased by increasing a second current in a circuitry though a node between the inductor and the loading.

    摘要翻译： 增加流过电感器的电流的方法包括：接收具有驱动级的输入信号，所述驱动级包括与驱动级的输出节点和电源线之间的负载串联耦合的电感器。 响应于从第一电压状态到第二电压状态的输入信号的转变，流过负载和电感器的第一电流增加。 在输入信号的转变期间，流过电感器的电流通过在电感器中通过电感器和负载之间的节点增加第二电流来增加。

    DRIVERS HAVING T-COIL STRUCTURES
    7.
    发明申请
    DRIVERS HAVING T-COIL STRUCTURES 有权
    具有T型线圈结构的驱动器

    公开(公告)号：US20150035566A1

    公开(公告)日：2015-02-05

    申请号：US14520646

    申请日：2014-10-22

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    发明人： Ming-Chieh HUANG ,  Tao Wen CHUNG ,  Chan-Hong CHERN ,  Chih-Chang LIN ,  Yuwen SWEI ,  Chiang PU

    IPC分类号： H03H11/44

    CPC分类号： H03H11/44 ,  H01S5/0427 ,  H04B10/504

    摘要： A driver includes a first driver stage having a first T-coil structure. The first T-coil structure includes a first set of inductors each being operable to provide a first inductance. The first T-coil structure further includes a second set of inductors electrically coupled with the first set of inductors, wherein the second set of inductors each are operable to provide a second inductance.

    摘要翻译： 驱动器包括具有第一T形线圈结构的第一驱动器级。 第一T型线圈结构包括第一组电感器，每个电感器可操作以提供第一电感。 第一T型线圈结构还包括与第一组电感器电耦合的第二组电感器，其中第二组电感器各自可操作以提供第二电感。

    SLICER AND METHOD OF OPERATING THE SAME
    9.
    发明申请
    SLICER AND METHOD OF OPERATING THE SAME 有权
    SLICER及其操作方法

    公开(公告)号：US20140119426A1

    公开(公告)日：2014-05-01

    申请号：US14149984

    申请日：2014-01-08

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    发明人： Ming-Chieh HUANG ,  Chan-Hong CHERN ,  Tao Wen CHUNG ,  Chih-Chang LIN ,  Tsung-Ching HUANG ,  Derek C. TAO

    IPC分类号： H03K5/08 ,  H04L27/01

    CPC分类号： H03K5/08 ,  H03K3/356139 ,  H04L27/01

    摘要： A slicer includes a first latch. The first latch includes an evaluating transistor configured to receive a first clock signal. The first latch further includes a developing transistor configured to receive a second clock signal, wherein the first clock signal is different from the second clock signal. The first latch further includes a first input transistor configured to receive a first input. The first latch further includes a second input transistor configured to receive a second input, wherein the first and second input transistors are connected with the developing transistor. The first latch further includes at least one pre-charging transistor configured to receive a third clock signal, wherein the at least one pre-charging transistor is connected to a first output node and a second output node. The slicer further includes a second latch connected to the first and second output nodes and to a third output node.

    摘要翻译： 切片机包括第一闩锁。 第一锁存器包括被配置为接收第一时钟信号的评估晶体管。 第一锁存器还包括被配置为接收第二时钟信号的显影晶体管，其中第一时钟信号不同于第二时钟信号。 第一锁存器还包括被配置为接收第一输入的第一输入晶体管。 第一锁存器还包括被配置为接收第二输入的第二输入晶体管，其中第一和第二输入晶体管与显影晶体管连接。 第一锁存器还包括配置成接收第三时钟信号的至少一个预充电晶体管，其中所述至少一个预充电晶体管连接到第一输出节点和第二输出节点。 切片器还包括连接到第一和第二输出节点和第三输出节点的第二锁存器。