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    METHOD FOR PRODUCING CHIP VARISTOR AND CHIP VARISTOR
    2.
    发明申请
    METHOD FOR PRODUCING CHIP VARISTOR AND CHIP VARISTOR 有权

    公开(公告)号：US20220189665A1

    公开(公告)日：2022-06-16

    申请号：US17687752

    申请日：2022-03-07

    Applicant: TDK CORPORATION

    Inventor： Satoshi GOTO ,  Naoyoshi YOSHIDA ,  Takeshi YANATA ,  Takeshi OYANAGI ,  Daiki SUZUKI ,  Shin KAGAYA ,  Masayuki UCHIDA ,  Yusuke IMAI

    IPC: H01C7/10 ,  H01C7/102 ,  H01C7/108

    Abstract: A chip varistor includes an element body exhibiting varistor characteristics, internal electrodes containing a first electrically conductive material, and an intermediate conductor containing a second electrically conductive material. The intermediate conductor is separated from the internal electrodes in a direction in which the internal electrodes oppose each other, and is disposed between the internal electrodes. At least a part of the intermediate conductor overlaps the internal electrodes in the direction in which the internal electrodes oppose each other. The element body includes a low resistance region in which the second electrically conductive material is diffused. The low resistance region is located between the first and second internal electrodes in the direction in which the first and second internal electrodes oppose each other.

    PIEZOELECTRIC DEVICE
    4.
    发明申请
    PIEZOELECTRIC DEVICE 有权
    压电器件

    公开(公告)号：US20150276504A1

    公开(公告)日：2015-10-01

    申请号：US14642053

    申请日：2015-03-09

    Applicant: TDK CORPORATION

    Inventor： Takeshi YANATA ,  Yo SAITO ,  Kazuto TAKEYA ,  Katsunari MORIAI ,  Takashi INAGAKI ,  Takahiro ITAMI ,  Takeshi OYANAGI ,  Hitoshi ISHIDA

    IPC: G01K7/22 ,  H01L41/00

    CPC classification number: G01K7/22 ,  G01K1/14 ,  H01L41/0533 ,  H03H9/02102 ,  H03H9/0519 ,  H03H9/0557 ,  H03H9/1014 ,  H03H9/1021

    Abstract: Provided is a piezoelectric device capable of improving measurement precision of a temperature of a piezoelectric element. A piezoelectric device (1) includes a package (2) including a housing member (4) having a thermistor substrate (3) and a frame (7) provided to project from a first main surface (3a) of the thermistor substrate (3) and in which a housing part (6) is formed by the first main surface (3a) and the frame (7) and a lid (9) provided on the frame (7) to cover a space (5) of the housing part (6), and a piezoelectric vibration element (5) provided on the first main surface (3a) of the thermistor substrate (3) in the housing part (6), wherein the thermistor substrate (3) is a multilayer negative temperature coefficient (NTC) thermistor.

    Abstract translation: 提供一种能够提高压电元件的温度的测量精度的压电元件。 压电装置（1）包括：包括具有热敏电阻基板（3）的壳体构件（4）和设置成从热敏电阻基板（3）的第一主表面突出的框架（7）的封装（2） 并且其中壳体部分（6）由第一主表面（3a）和框架（7）形成，盖子（9）设置在框架（7）上以覆盖壳体部分（5）的空间 6）和设置在壳体部（6）中的热敏电阻基板（3）的第一主面（3a）上的压电振动元件（5），其中，热敏电阻基板（3）为多层负温度系数 ）热敏电阻。

    MULTILAYER CHIP VARISTOR
    5.
    发明申请
    MULTILAYER CHIP VARISTOR 有权

    公开(公告)号：US20220165460A1

    公开(公告)日：2022-05-26

    申请号：US17533920

    申请日：2021-11-23

    Applicant: TDK CORPORATION

    Inventor： Shin KAGAYA ,  Masayuki UCHIDA ,  Naoyoshi YOSHIDA ,  Takeshi YANATA ,  Satoshi GOTO ,  Takeshi OYANAGI ,  Yusuke IMAI ,  Daiki SUZUKI ,  Kaname UEDA

    IPC: H01C7/18 ,  H01C7/10 ,  H01C7/112

    Abstract: A multilayer chip varistor includes an element body, first and second external electrodes, and first and second electrical conductor groups. The first electrical conductor group includes a first internal electrode connected to the first external electrode, and a first intermediate electrical conductor opposed to the first internal electrode. The second electrical conductor group includes a second internal electrode including a first electrically conductive material and connected to the second external electrode, and a second intermediate electrical conductor opposed to the second internal electrode. At least one of the first and second intermediate electrical conductors includes the second electrically conductive material. The element body includes a low electrical resistance region between the first and second internal electrodes. The second electrically conductive material is diffused in the low electrical resistance region.

    METHOD FOR PRODUCING CHIP VARISTOR AND CHIP VARISTOR
    6.
    发明申请
    METHOD FOR PRODUCING CHIP VARISTOR AND CHIP VARISTOR 有权

    公开(公告)号：US20210327616A1

    公开(公告)日：2021-10-21

    申请号：US17230100

    申请日：2021-04-14

    Applicant: TDK CORPORATION

    Inventor： Satoshi GOTO ,  Naoyoshi YOSHIDA ,  Takeshi YANATA ,  Takeshi OYANAGI ,  Daiki SUZUKI ,  Shin KAGAYA ,  Masayuki UCHIDA ,  Yusuke IMAI

    IPC: H01C7/10 ,  H01C7/108 ,  H01C7/102

    Abstract: A chip varistor includes an element body exhibiting varistor characteristics, internal electrodes containing a first electrically conductive material, and an intermediate conductor containing a second electrically conductive material. The intermediate conductor is separated from the internal electrodes in a direction in which the internal electrodes oppose each other, and is disposed between the internal electrodes. At least a part of the intermediate conductor overlaps the internal electrodes in the direction in which the internal electrodes oppose each other. The element body includes a low resistance region in which the second electrically conductive material is diffused. The low resistance region is located between the first and second internal electrodes in the direction in which the first and second internal electrodes oppose each other.

    PIEZOELECTRIC DEVICE
    7.
    发明申请
    PIEZOELECTRIC DEVICE 有权
    压电器件

    公开(公告)号：US20150249199A1

    公开(公告)日：2015-09-03

    申请号：US14596696

    申请日：2015-01-14

    Applicant: TDK CORPORATION

    Inventor： Takeshi YANATA ,  Yo SAITO ,  Kazuto TAKEYA ,  Katsunari MORIAI ,  Takashi INAGAKI ,  Takahiro ITAMI ,  Takeshi OYANAGI ,  Hitoshi ISHIDA

    IPC: H01L41/053

    CPC classification number: H03H9/1021 ,  H01L41/053 ,  H01L2924/16195

    Abstract: A piezoelectric device has: a ceramic substrate having a first principal surface and a second principal surface opposed to each other; a piezoelectric element arranged on the first principal surface; a frame having a first face and a second face opposed to each other and arranged on the ceramic substrate so as to surround the piezoelectric element; a metal layer arranged on the second face of the frame; and a metal lid arranged on the metal layer so as to close a space surrounded by the frame. The first face of the frame is in contact with the first principal surface of the ceramic substrate. The metal layer and the metal lid are joined to each other by resistance welding. The frame has a composite portion containing a metal and a metal oxide and the composite portion includes the second face and is in contact with the metal layer.

    Abstract translation: 一种压电装置具有：具有彼此相对的第一主表面和第二主表面的陶瓷基板; 布置在所述第一主表面上的压电元件; 框架，其具有彼此相对并且布置在陶瓷基板上以围绕压电元件的第一面和第二面; 布置在所述框架的第二面上的金属层; 以及金属盖，其布置在金属层上以封闭由框架包围的空间。 框架的第一面与陶瓷基板的第一主表面接触。 金属层和金属盖通过电阻焊接彼此接合。 框架具有包含金属和金属氧化物的复合部分，并且复合部分包括第二面并与金属层接触。

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