公开(公告)号：US20230087151A1

公开(公告)日：2023-03-23

申请号：US17502692

申请日：2021-10-15

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Thomas Grebs ,  Meng-Chia Lee ,  Hong Yang ,  Ya ping Chen ,  Sunglyong Kim

IPC: H01L29/40 ,  H01L29/78 ,  H01L29/66

Abstract: A trench gate metal oxide semiconductor (MOSFET) device includes a substrate with a semiconductor surface layer doped a first conductivity type. At least one trench gate MOSFET cell is located in or over the semiconductor surface layer, and includes a body region in the semiconductor surface layer doped a second conductivity type, and a source region on top of the body region doped the first conductivity type. A trench extends down from a top side of the semiconductor surface layer, the trench abutting the body region and being lined with a dielectric material. A field plate that includes polysilicon is located in the trench, and a gate electrode is located over the field plate. The field plate has a bottom portion, a middle portion, and a top portion, wherein the bottom portion is narrower than the middle portion, and the middle portion is narrower than the top portion.

公开(公告)号：US20240363394A1

公开(公告)日：2024-10-31

申请号：US18141153

申请日：2023-04-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Dong Seup Lee ,  Sunglyong Kim ,  Meng-Chia Lee ,  Satoshi Suzuki ,  Seetharaman Sridhar

IPC: H01L21/761 ,  H01L27/088

CPC classification number: H01L21/761 ,  H01L27/088 ,  H01L21/2652 ,  H01L21/266 ,  H01L29/66681

Abstract: Described examples include an integrated circuit having a substrate, a first doped region in the substrate having a first conductivity type, and a first epitaxial layer on the substrate, wherein the first doped region extends into the first epitaxial layer. The integrated circuit also has a second doped region in the first epitaxial layer having the first conductivity type, a second epitaxial layer on the first epitaxial layer, wherein the second doped region extends into the second epitaxial layer. The integrated circuit also has a well in the second epitaxial layer having a second conductivity type, and a first active device formed in the well.

公开(公告)号：US20250120157A1

公开(公告)日：2025-04-10

申请号：US18610150

申请日：2024-03-19

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jonas Höhenberger ,  Ujwal Radhakrishna ,  Michael Lueders ,  Meng-Chia Lee ,  Chang Soo Suh ,  Zhikai Tang ,  Jungwoo Joh ,  Timothy Bryan Merkin ,  Stefan Herzer ,  Bernhard Ziegltrum ,  Helmut Rinck ,  Michael Hans Enzelberger-Heim ,  Ercuement Hasanoglu

IPC: H01L29/40 ,  H01L21/027 ,  H01L21/311 ,  H01L29/20 ,  H01L29/66 ,  H01L29/778

Abstract: The present disclosure generally relates to a semiconductor device having a slanted field plate. In an example, a semiconductor device includes a semiconductor substrate, a gate, a drain contact, a source contact, and a field plate. The gate is on a surface of the semiconductor substrate. The drain contact and a source contact are on the semiconductor substrate. The field plate is over the surface of the semiconductor substrate and extends from one side of the gate towards the drain contact. The field plate includes multiple field plate portions. Each of the multiple field plate portions has a uniform respective slope with respect to the surface, and the multiple field plate portions have different slopes.

公开(公告)号：US11456381B2

公开(公告)日：2022-09-27

申请号：US17123835

申请日：2020-12-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Meng-Chia Lee ,  Sunglyong Kim ,  Seetharaman Sridhar ,  Sameer Pendharkar

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/10

Abstract: Described examples include an integrated circuit having a semiconductor substrate. The integrated circuit has a transistor that includes a buried layer having within the substrate, the buried layer defining a drift region between the buried layer and the top surface and a body region in the substrate extending from the buried layer to the surface of the substrate. The transistor also having a source formed in the body region, a drain extending from the buried layer to the surface of the substrate, a drift well extending from the buried layer toward the top surface and extending from the body region to the drain, a drift surface layer located between the drift well and the top, and a gate proximate to the surface of the substrate at the body region.

公开(公告)号：US20220190158A1

公开(公告)日：2022-06-16

申请号：US17123835

申请日：2020-12-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Meng-Chia Lee ,  Sunglyong Kim ,  Seetharaman Sridhar ,  Sameer Pendharkar

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/66

Abstract: Described examples include an integrated circuit having a semiconductor substrate. The integrated circuit has a transistor that includes a buried layer having within the substrate, the buried layer defining a drift region between the buried layer and the top surface and a body region in the substrate extending from the buried layer to the surface of the substrate. The transistor also having a source formed in the body region, a drain extending from the buried layer to the surface of the substrate, a drift well extending from the buried layer toward the top surface and extending from the body region to the drain, a drift surface layer located between the drift well and the top, and a gate proximate to the surface of the substrate at the body region.