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    TRIMMING OPERATIONAL AMPLIFIERS
    2.
    发明申请
    TRIMMING OPERATIONAL AMPLIFIERS 有权

    公开(公告)号：US20220209730A1

    公开(公告)日：2022-06-30

    申请号：US17136073

    申请日：2020-12-29

    Applicant: Texas Instruments Incorporated

    Inventor： Vadim Valerievich Ivanov ,  Munaf Hussain Shaik ,  Srinivas Kumar Pulijala ,  Patrick Forster ,  Jerry Lee Doorenbos

    IPC: H03F3/45 ,  H03M1/38 ,  H03M1/66

    Abstract: Disclosed is a system that comprises an operational amplifier with adjustable operational parameters and a trimming module. The trimming module can adjust the operational parameters of the op-amp based on a memory value to compensate for an offset voltage of the op-amp. The trimming module can comprise successive approximation register (SAR) logic that controls the memory value. The SAR logic can be configured to detect a given memory value that causes an output voltage of the op-amp to be within a predetermined voltage interval when applying a predetermined common mode voltage to inverting and non-inverting inputs of the op-amp.

    High voltage output stage
    3.
    发明授权
    High voltage output stage 有权

    公开(公告)号：US11183976B2

    公开(公告)日：2021-11-23

    申请号：US16708660

    申请日：2019-12-10

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Steven Graham Brantley ,  Munaf Hussain Shaik ,  Bhuvanesh Radhakrishnan Kulasekaran

    IPC: H03F1/22 ,  H03F1/34 ,  H03F3/213

    Abstract: An amplifier circuit includes a high-voltage output stage. The high-voltage output stage includes an output terminal, a high-side output circuit, a low-side output circuit, and a feedback circuit. The high-side output circuit sources current to the output terminal, and includes a high-side input transistor, a first high-side cascode transistor coupled to the high-side input transistor, and a second high-side cascode transistor coupled to the first high-side cascode transistor and the output terminal. The low-side output circuit sinks current from the output terminal, and includes a low-side input transistor, a first low-side cascode transistor coupled to the low-side input transistor, and a second low-side cascode transistor coupled to the first low-side cascode transistor and the output terminal. The feedback circuit is configured to bias the second high-side cascode transistor and the second low-side cascode transistor based on a sense voltage generated by the high-side output circuit or the low-side output circuit.

    Operational amplifier with indirect current feedback current limiter
    4.
    发明授权
    Operational amplifier with indirect current feedback current limiter 有权

    公开(公告)号：US11888447B2

    公开(公告)日：2024-01-30

    申请号：US17232985

    申请日：2021-04-16

    Applicant: Texas Instruments Incorporated

    Inventor： Munaf Hussain Shaik ,  Srinivas Kumar Pulijala ,  Vadim Valerievich Ivanov

    IPC: H03F3/45 ,  H03F1/02

    CPC classification number: H03F1/0233 ,  H03F3/45475 ,  H03F2200/462 ,  H03F2200/471 ,  H03F2200/504

    Abstract: A circuit includes an operational amplifier having: a positive input; a negative input; an operational amplifier output; a differential front end; a positive channel (PCH) input stage; a negative channel (NCH) input stage; and an output stage. The operational amplifier also includes a current limit circuit coupled to an output of the output stage and including: an output current sense voltage circuit having an output configured to provide an output current sense voltage; an indirect current feedback circuit coupled to the output of the output current sense voltage circuit, the indirect current feedback circuit having an output configured to provide an output current feedback sense voltage responsive to the output current sense voltage; and control circuitry coupled to the indirect current feedback circuit and configured vary a resistance between the output stage output and ground responsive to a difference between the output current feedback sense voltage and a reference voltage.

    Level shifter
    7.
    发明授权
    Level shifter 有权

    公开(公告)号：US10483977B1

    公开(公告)日：2019-11-19

    申请号：US16275401

    申请日：2019-02-14

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Jeffrey Wallace Berwick ,  Adam Lee Shook ,  Munaf Hussain Shaik ,  Mohit Chawla

    IPC: H03K19/0185 ,  H03K19/0175

    Abstract: A level shifter circuit includes a high voltage latch circuit, a low voltage latch circuit, a high state pulse generator, and a low state pulse generator. The high voltage latch circuit includes a non-inverting output terminal, an inverting output terminal, a high state trigger input terminal, and a low state trigger input terminal. The low voltage latch circuit includes a high state trigger input terminal and a low state trigger input terminal. The high state trigger input terminal is coupled to the inverting output terminal of the high voltage latch circuit. The low state trigger input terminal is coupled to the non-inverting output terminal of the high voltage latch circuit. The high state pulse generator is coupled to the high state trigger input terminal of the high voltage latch circuit. The low state pulse generator is coupled to the low state trigger input terminal of the high voltage latch circuit.

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