Fine-grained dynamic power and clock-gating control

    公开(公告)号:US10545556B2

    公开(公告)日:2020-01-28

    申请号:US15591823

    申请日:2017-05-10

    Abstract: An IC includes logic groups each including a launch and a capture FF with a logic cloud in between. A power switch is in series with a power supply node of the logic groups. The logic groups have a clock-gating and power control (PCGC) block for dynamically generating a power supply enable (PS_EN) signal output coupled to a control node of the power switch and a clock output (CLK_OUT) signal coupled to a clock input of the launch or capture FF for clocking the logic groups. The PCGC blocks receive an EN signal and a CLK_IN signal and dynamically generate the PS_EN signal and CLK_OUT signals. During clock cycles at least one logic group(s) does not contribute to an intended logic result for the IC the CLK_OUT signal disables switching of at least a portion of the logic group(s) while the PS_EN signal turns off power to the logic group(s).

    Enhanced fault detection of latched data

    公开(公告)号:US10782346B2

    公开(公告)日:2020-09-22

    申请号:US16252674

    申请日:2019-01-20

    Abstract: In described examples, a latch includes active feedback circuitry for latching input information. A comparison of logic states between input and output states at selected times can determine whether, for example, the latch has correctly retained latch data. The latch can optionally be included within a scan chain, provide asynchronous latch error notifications, and/or synchronous notifications indicating where in the scan chain a latch error occurred.

    LOOK-UP TABLE INITIALIZE
    8.
    发明申请

    公开(公告)号:US20220137970A1

    公开(公告)日:2022-05-05

    申请号:US17577482

    申请日:2022-01-18

    Abstract: A digital data processor includes an instruction memory storing instructions specifying a data processing operation and a data operand field, an instruction decoder coupled to the instruction memory for recalling instructions from the instruction memory and determining the operation and the data operand, and an operational unit coupled to a data register file and to an instruction decoder to perform a data processing operation upon an operand corresponding to an instruction decoded by the instruction decoder and storing results of the data processing operation. The operational unit is configured to perform a table write in response to a look up table initialization instruction by duplicating at least one data element from a source data register to create duplicated data elements, and writing the duplicated data elements to a specified location in a specified number of at least one table and a corresponding location in at least one other table.

    ENHANCED FAULT DETECTION OF LATCHED DATA
    9.
    发明申请

    公开(公告)号:US20200379040A1

    公开(公告)日:2020-12-03

    申请号:US16995855

    申请日:2020-08-18

    Abstract: In described examples, a latch includes active feedback circuitry for latching input information. A comparison of logic states between input and output states at selected times can determine whether, for example, the latch has correctly retained latch data. The latch can optionally be included within a scan chain, provide asynchronous latch error notifications, and/or synchronous notifications indicating where in the scan chain a latch error occurred.

    Look-up table initialize
    10.
    发明授权

    公开(公告)号:US11226822B2

    公开(公告)日:2022-01-18

    申请号:US16570778

    申请日:2019-09-13

    Abstract: A digital data processor includes an instruction memory storing instructions specifying a data processing operation and a data operand field, an instruction decoder coupled to the instruction memory for recalling instructions from the instruction memory and determining the operation and the data operand, and an operational unit coupled to a data register file and to an instruction decoder to perform a data processing operation upon an operand corresponding to an instruction decoded by the instruction decoder and storing results of the data processing operation. The operational unit is configured to perform a table write in response to a look up table initialization instruction by duplicating at least one data element from a source data register to create duplicated data elements, and writing the duplicated data elements to a specified location in a specified number of at least one table and a corresponding location in at least one other table.

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