公开(公告)号：US10032868B2

公开(公告)日：2018-07-24

申请号：US15261024

申请日：2016-09-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Bernhard Benna ,  Wolfgang Schwartz ,  Berthold Georg Staufer

IPC: H01L29/08 ,  H01L21/265 ,  H01L21/266 ,  H01L29/73 ,  H01L29/732

Abstract: A method for making a super β NPN (SBNPN) transistor includes depositing a tetraethyl orthosilicate (TEOS) layer on a P type epitaxial layer; depositing a nitride layer on the TEOS layer; patterning an emitter region of the SBNPN transistor by selectively etching away portions of the nitride layer and the TEOS layer; depositing a second TEOS layer on top of the nitride layer, along sides of the nitride layer and the TEOS layer, and on top of the P type epitaxial layer; and implanting the P type epitaxial layer through the second TEOS layer with N type ions to form the emitter region of the SBNPN transistor.

公开(公告)号：US10770538B2

公开(公告)日：2020-09-08

申请号：US15976357

申请日：2018-05-10

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Christoph Andreas Othmar Dirnecker ,  Wolfgang Schwartz ,  Doug Weiser ,  Joel Martin Halbert ,  Joseph Anthony DeSantis ,  Karsten Jens Spinger

IPC: H01L49/02 ,  H01L23/522 ,  H01L21/3213 ,  H01L21/027 ,  H01L21/268

Abstract: A method of forming an electronic device includes forming an opening through a dielectric layer located over a first resistive layer, the first resistive layer having a first sheet resistance. A second resistive layer is deposited over the dielectric layer and into the opening. The second resistive layer has a second sheet resistance different from the first sheet resistance. A portion of the second resistive layer is removed, thereby forming first and second noncontiguous portions of the second resistive layer, wherein the second portion of the second resistive layer contacts the first resistive layer.

公开(公告)号：US20180019297A1

公开(公告)日：2018-01-18

申请号：US15209696

申请日：2016-07-13

Applicant: Texas Instruments Incorporated ,  TEXAS INSTRUMENTS DEUTSCHLAND GMBH

Inventor： Christoph Andreas Othmar Dirnecker ,  Wolfgang Schwartz ,  Doug Weiser ,  Joel Martin Halbert ,  Joseph Anthony DeSantis ,  Karsten Jens Spinger

IPC: H01L49/02 ,  H01L23/522 ,  H01L21/268 ,  H01L21/027 ,  H01L21/3213 ,  H01L21/3205 ,  H01L23/528 ,  H01L21/768

CPC classification number: H01L28/24 ,  H01L21/0273 ,  H01L21/268 ,  H01L21/32051 ,  H01L21/32139 ,  H01L21/76802 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/5228 ,  H01L23/528

Abstract: An integrated circuit includes a higher sheet resistance resistor and a lower sheet resistance resistor, disposed in a same level of dielectric layers of the integrated circuit. The higher sheet resistor has a body region and head regions in a higher sheet resistance layer. The lower sheet resistor has a body region and head regions in a lower sheet resistance layer, which is thicker than the higher sheet layer. The higher sheet resistor has an upper head layer contacting the higher sheet layer at each head region of the higher sheet layer. Each upper head layer has a same composition and thickness as the lower sheet layer of the lower sheet resistor. The lower sheet resistor is free of head layers over the lower sheet resistance layer.

公开(公告)号：US11676993B2

公开(公告)日：2023-06-13

申请号：US17014094

申请日：2020-09-08

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Christoph Andreas Othmar Dirnecker ,  Wolfgang Schwartz ,  Doug Weiser ,  Joel Martin Halbert ,  Joseph Anthony DeSantis ,  Karsten Jens Spinger

IPC: H01L23/522 ,  H01L49/02 ,  H01L21/3213 ,  H01L21/027 ,  H01L21/268

CPC classification number: H01L28/24 ,  H01L21/0273 ,  H01L21/268 ,  H01L21/32139 ,  H01L23/5226 ,  H01L23/5228

Abstract: In one example an electronic device includes a first resistor and a second resistor. The first resistor includes a first resistive layer located over a substrate, the first resistive layer having a first sheet resistance. The second resistor includes a first portion of a second resistive layer located over the substrate, the second resistive layer having a second sheet resistance different from the first sheet resistance. The first resistive layer is located between the substrate and a second noncontiguous portion of the second resistive layer.

公开(公告)号：US20180261664A1

公开(公告)日：2018-09-13

申请号：US15976357

申请日：2018-05-10

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Christoph Andreas Othmar Dirnecker ,  Wolfgang Schwartz ,  Doug Weiser ,  Joel Martin Halbert ,  Joseph Anthony DeSantis ,  Karsten Jens Spinger

IPC: H01L49/02 ,  H01L21/3213 ,  H01L21/027 ,  H01L21/268 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/528 ,  H01L23/522

CPC classification number: H01L28/24 ,  H01L21/0273 ,  H01L21/268 ,  H01L21/32139 ,  H01L23/5226 ,  H01L23/5228

Abstract: An electronic device includes a first resistor and a second resistor. The first resistor includes a first resistive layer located over a substrate and having a first sheet resistance. The second resistor includes a first portion of a second resistive layer located over the substrate and having a second sheet resistance that is different from the first sheet resistance. The first resistive layer is located between the substrate and a second noncontiguous portion of the second resistive layer.

公开(公告)号：US09991329B2

公开(公告)日：2018-06-05

申请号：US15209696

申请日：2016-07-13

Applicant: Texas Instruments Incorporated

Inventor： Christoph Andreas Othmar Dirnecker ,  Wolfgang Schwartz ,  Doug Weiser ,  Joel Martin Halbert ,  Joseph Anthony DeSantis ,  Karsten Jens Spinger

IPC: H01L49/02 ,  H01L23/522 ,  H01L23/528 ,  H01L21/3205 ,  H01L21/768 ,  H01L21/3213 ,  H01L21/027 ,  H01L21/268

CPC classification number: H01L28/24 ,  H01L21/0273 ,  H01L21/268 ,  H01L21/32051 ,  H01L21/32139 ,  H01L21/76802 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/5228 ,  H01L23/528

Abstract: An integrated circuit includes a higher sheet resistance resistor and a lower sheet resistance resistor, disposed in a same level of dielectric layers of the integrated circuit. The higher sheet resistor has a body region and head regions in a higher sheet resistance layer. The lower sheet resistor has a body region and head regions in a lower sheet resistance layer, which is thicker than the higher sheet layer. The higher sheet resistor has an upper head layer contacting the higher sheet layer at each head region of the higher sheet layer. Each upper head layer has a same composition and thickness as the lower sheet layer of the lower sheet resistor. The lower sheet resistor is free of head layers over the lower sheet resistance layer.