公开(公告)号：US09310823B2

公开(公告)日：2016-04-12

申请号：US14263136

申请日：2014-04-28

Applicant: Texas Instruments Incorporated

Inventor： Xiao Pu ,  Krishnaswamy Nagaraj ,  Yue Hu

IPC: G05F1/10 ,  G05F3/22 ,  G05F3/30

CPC classification number: G05F3/222 ,  G05F3/30

Abstract: A voltage reference circuit includes a bipolar transistor and a circuit configured to measure the ratio of emitter current to base current of the bipolar transistor. The output voltage of the voltage reference circuit is compensated as a function of the measured ratio.

Abstract translation: 电压参考电路包括双极晶体管和被配置为测量双极晶体管的发射极电流与基极电流的比率的电路。 电压参考电路的输出电压作为测量比的函数进行补偿。

公开(公告)号：US09762259B1

公开(公告)日：2017-09-12

申请号：US15401957

申请日：2017-01-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Xiao Pu ,  Krishnaswamy Nagaraj ,  Peng Cao

IPC: H03M3/00 ,  H03M1/12 ,  H03M1/46

CPC classification number: H03M3/436 ,  H03L7/093 ,  H03M3/404 ,  H03M3/424 ,  H03M3/458

Abstract: A notch filter in a sigma-delta modulator loop filter increases SNR by limiting in-band quantization noise around a frequency to which the notch filter is precisely tuned. A tuning mode controller isolates the notch filter from other loop filter stages. A bias voltage is applied to the notch filter, causing it to resonate. Tuning mode switches insert the notch filter into a frequency-locked loop (“FLL”) circuit as a variable frequency oscillator component of the FLL. An ADC operational mode input signal is applied to the FLL as a reference signal. A tuning control component of the FLL adjusts a tunable feedback element in the notch filter to drive the FLL error signal to zero in order to precisely tune the notch filter to the center frequency of the ADC input signal. Tuning inputs to the tunable feedback element are then latched prior to re-inserting the notch filter into the modulator.

公开(公告)号：US09438266B1

公开(公告)日：2016-09-06

申请号：US15040572

申请日：2016-02-10

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Krishnaswamy Nagaraj ,  Manish Goel ,  Xiao Pu ,  Hun-Seok Kim

IPC: H03M1/10 ,  H03M3/00

CPC classification number: H03M3/464 ,  H03M3/38

Abstract: A direct current (“DC”) calibration reference voltage is applied at an input terminal of an N-level sigma-delta analog-to-digital converter (“ADC”). The ADC includes a current-mode DAC (“I-DAC”) operating as a feedback element. A count of logical 1s associated with each of N output levels is taken at outputs of a modulator portion of the ADC during a first mismatch measurement interval. Mismatch measurement logic subsequently transposes pairs of current sources between level selection switch matrices. Doing so causes modulator output error components resulting from mismatches between I-DAC current sources (“delta”) to appear as differential level-specific output counts. The mismatch measurement logic compares the differential counts to determine values of delta. The ADC then factors decimated modulator output counts by values of delta in order to correct for the I-DAC current source mismatch(es).

Abstract translation: 在N级Σ-Δ模数转换器（“ADC”）的输入端施加直流（“DC”）校准参考电压。 ADC包括作为反馈元件工作的电流模式DAC（“I-DAC”）。 在第一失配测量间隔期间，在ADC的调制器部分的输出处获取与N个输出电平中的每一个相关联的逻辑1的计数。 不匹配测量逻辑随后在电平选择开关矩阵之间转置电流源对。 这样做会导致由I-DAC电流源（“delta”）之间的不匹配导致的调制器输出误差分量作为差分电平特定输出计数。 不匹配测量逻辑比较差分计数以确定delta的值。 ADC然后通过delta值将衰减的调制器输出计数值除数，以校正I-DAC电流源不匹配。

公开(公告)号：US20150309525A1

公开(公告)日：2015-10-29

申请号：US14263136

申请日：2014-04-28

Applicant: Texas Instruments Incorporated

Inventor： Xiao Pu ,  Krishnaswamy Nagaraj ,  Yue Hu

IPC: G05F3/22 ,  G05F3/30

CPC classification number: G05F3/222 ,  G05F3/30

Abstract: A voltage reference circuit includes a bipolar transistor and a circuit configured to measure the ratio of emitter current to base current of the bipolar transistor. The output voltage of the voltage reference circuit is compensated as a function of the measured ratio.

Abstract translation: 电压参考电路包括双极晶体管和被配置为测量双极晶体管的发射极电流与基极电流的比率的电路。 电压参考电路的输出电压作为测量比的函数进行补偿。

公开(公告)号：US20150003490A1

公开(公告)日：2015-01-01

申请号：US13931799

申请日：2013-06-28

Applicant: Texas Instruments Incorporated

Inventor： Mikel K. Ash ,  Xiao Pu ,  Joonsung Park ,  Krishnaswamy Nagaraj

IPC: G01K15/00

CPC classification number: G01K15/005 ,  G01K7/01 ,  G01K2219/00

Abstract: A temperature sensor uses a semiconductor device that has a known voltage drop characteristic that is proportional to absolute temperature (PTAT). A controllable current source is coupled to the semiconductor device and is operable to sequentially inject a bias current having a value I(bias) and fixed ratio N of I(bias) into the semiconductor device. A delta sigma analog to digital converter (ADC) has an input coupled to the semiconductor device. The delta sigma ADC is configured to sample and integrate a sequence of voltages pairs produced across the semiconductor device by repeatedly injecting an ordered sequence of selected bias currents into the semiconductor device. The ordered sequence of selected bias currents comprises M repetitions of (N×I(bias); I(bias)) and one repetition of (M×I(bias); M×N×I(bias)).

Abstract translation: 温度传感器使用具有与绝对温度（PTAT）成比例的已知电压降特性的半导体器件。 可控电流源耦合到半导体器件，并且可操作地将具有值I（偏置）和I（偏压）的固定比率N的偏置电流顺序地注入到半导体器件中。 ΔΣ模数转换器（ADC）具有耦合到半导体器件的输入。 ΔΣADC被配置为通过将选择的偏置电流的有序序列重复地注入到半导体器件中来对半导体器件产生的电压对序列进行采样和积分。 选择的偏置电流的有序序列包括（N×I（偏置）; I（偏置））和（M×I（偏置）; M×N×I（偏置））的一次重复的M次重复。

公开(公告)号：US09395253B2

公开(公告)日：2016-07-19

申请号：US13931799

申请日：2013-06-28

Applicant: Texas Instruments Incorporated

Inventor： Mikel K. Ash ,  Xiao Pu ,  Joonsung Park ,  Krishnaswamy Nagaraj

IPC: G01K15/00 ,  G01K7/00 ,  H03M3/00 ,  G01K7/01

CPC classification number: G01K15/005 ,  G01K7/01 ,  G01K2219/00

Abstract: A temperature sensor uses a semiconductor device that has a known voltage drop characteristic that is proportional to absolute temperature (PTAT). A controllable current source is coupled to the semiconductor device and is operable to sequentially inject a bias current having a value I(bias) and fixed ratio N of I(bias) into the semiconductor device. A delta sigma analog to digital converter (ADC) has an input coupled to the semiconductor device. The delta sigma ADC is configured to sample and integrate a sequence of voltages pairs produced across the semiconductor device by repeatedly injecting an ordered sequence of selected bias currents into the semiconductor device. The ordered sequence of selected bias currents comprises M repetitions of (N×I(bias); I(bias)) and one repetition of (M×I(bias); M×N×I(bias)).

Abstract translation: 温度传感器使用具有与绝对温度（PTAT）成比例的已知电压降特性的半导体器件。 可控电流源耦合到半导体器件，并且可操作地将具有值I（偏置）和I（偏压）的固定比率N的偏置电流顺序地注入到半导体器件中。 ΔΣ模数转换器（ADC）具有耦合到半导体器件的输入。 ΔΣADC被配置为通过将选择的偏置电流的有序序列重复地注入到半导体器件中来对半导体器件产生的电压对序列进行采样和积分。 选择的偏置电流的有序序列包括（N×I（偏置）; I（偏置））和（M×I（偏置）; M×N×I（偏置））的一次重复的M次重复。