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公开(公告)号：US10020817B1
公开(公告)日：2018-07-10
申请号：US15790986
申请日：2017-10-23
发明人： Jun Zhang
CPC分类号： H03M3/38 , H03M1/066 , H03M1/1061 , H03M1/66 , H03M1/661 , H03M1/68 , H03M1/785 , H03M3/34 , H03M3/502
摘要： Disclosed examples include a segmented DAC circuit, including an R-2R resistor DAC to convert a first subword to a first analog output signal, an interpolation DAC to offset the first analog output signal based on an N-bit digital interpolation code signal to provide the analog output signal, and a Sigma Delta modulator to modulate a modulator code to provide the N-bit digital interpolation code signal that represents a value of second and third subwords.
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2.发明授权Mostly-digital open-loop ring oscillator delta-sigma ADC and methods for conversion 有权大多数数字开环环形振荡器delta-sigma ADC和转换方法公开(公告)号：US09397691B2
公开(公告)日：2016-07-19
申请号：US14302626
申请日：2014-06-12
发明人： Ian Galton , Gerry Taylor
IPC分类号： H03M3/00
摘要： A continuous-time delta-sigma modulator for analog-to-digital conversion includes a pair of pseudo-differential signal paths including a pair of pseudo-differential signal paths including current-controlled ring oscillators as the load of open-loop common-source amplifiers that are driven by an analog input signal. The signal path produces digital values by sampling the open-loop current-controlled ring oscillators. A calibration circuit measures nonlinear distortion coefficients in a replica of the signal path. A nonlinearity corrector corrects digital values based upon the nonlinear distortion coefficients.
摘要翻译： 用于模数转换的连续时间Δ-Σ调制器包括一对伪差分信号路径，其包括一对伪差分信号路径，包括作为开环共源极放大器的负载的电流控制环形振荡器 由模拟输入信号驱动。 信号路径通过采样开环电流控制的环形振荡器产生数字值。 校准电路测量信号路径副本中的非线性失真系数。 非线性校正器基于非线性失真系数校正数字值。
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3.发明授权Digital tuning engine for highly programmable delta-sigma analog-to-digital converters 有权数字调谐引擎，用于高度可编程的delta-sigma模数转换器公开(公告)号：US09209827B2
公开(公告)日：2015-12-08
申请号：US14657919
申请日：2015-03-13
CPC分类号： H03M3/38 , H03M1/1009 , H03M3/392 , H03M3/424 , H03M3/454
摘要： An integrated circuit includes a component calculator configured to compute at least one component value of a highly programmable analog-to-digital converter (ADC) from at least one application parameter, and a mapping module configured to map the component value to a corresponding register setting of the ADC based on at least one process parameter, wherein the integrated circuit produces digital control signals capable of programming the ADC. In a specific embodiment, the component calculator uses an algebraic function of a normalized representation of the application parameter to approximately evaluate at least one normalized ADC coefficient. The component value is further calculated by decimalizing the normalized ADC coefficient. In another specific embodiment, the component calculator uses an algebraic function of the application parameter to calculate the component value. In some embodiments, the integrated circuit further includes a scaling module configured to scale the component value based on scaling parameters.
摘要翻译： 集成电路包括：组件计算器，被配置为从至少一个应用参数计算高可编程模数转换器（ADC）的至少一个分量值;以及映射模块，被配置为将分量值映射到对应的寄存器设置 基于至少一个工艺参数，其中所述集成电路产生能够编程所述ADC的数字控制信号。 在具体实施例中，组件计算器使用应用参数的归一化表示的代数函数来近似评估至少一个归一化的ADC系数。 通过对归一化的ADC系数进行十进制化，进一步计算分量值。 在另一具体实施例中，组件计算器使用应用参数的代数函数来计算组件值。 在一些实施例中，集成电路还包括缩放模块，其被配置为基于缩放参数来缩放分量值。
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公开(公告)号：US09130584B1
公开(公告)日：2015-09-08
申请号：US14558640
申请日：2014-12-02
IPC分类号： H03M3/00
摘要： Provided are, among other things, systems, methods and techniques for converting a continuous-time, continuously variable signal into a sampled and quantized signal. According to one implementation, an apparatus includes multiple processing branches, each including: a continuous-time quantization-noise-shaping circuit, a sampling/quantization circuit, and a digital bandpass filter. A combining circuit then combines signals at the processing branch outputs into a final output signal. The continuous-time quantization-noise-shaping circuits include adjustable circuit components for changing their quantization-noise frequency-response minimum, and the digital bandpass filters include adjustable parameters for changing their frequency passbands.
摘要翻译： 尤其提供了用于将连续时间连续可变信号转换为采样和量化信号的系统，方法和技术。 根据一个实现，一种装置包括多个处理分支，每个分支包括：连续时间量化噪声整形电路，采样/量化电路和数字带通滤波器。 然后，组合电路将处理分支输出处的信号组合成最终的输出信号。 连续时间量化噪声整形电路包括用于改变其量化噪声频率响应最小值的可调节电路部件，并且数字带通滤波器包括用于改变其频率通带的可调参数。
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公开(公告)号：US20150222289A1
公开(公告)日：2015-08-06
申请号：US14425095
申请日：2013-02-28
发明人： Lan Chen
摘要： A Sigma-Delta modulator and an analog-to-digital converter. The Sigma-Delta modulator comprises a quantizer, a correction module and an RC integrator. The correction module comprises a predetermined resistance through which a correction level is generated. The correction module is used to compare the correction level with a predetermined reference voltage by using a comparator in the quantizer, so as to generate a digital correction signal, based on which the resistance in a resistance correction array in the RC integrator is corrected. The predetermined resistance is of the same type as the resistance in the resistance correction array in the RC integrator. The Sigma-Delta modulator and the analog-to-digital converter can correct the resistance deviation in the RC integrator.
摘要翻译： Σ-Δ调制器和模数转换器。 Sigma-Delta调制器包括量化器，校正模块和RC积分器。 校正模块包括产生校正水平的预定电阻。 校正模块用于通过使用量化器中的比较器将校正电平与预定参考电压进行比较，以产生数字校正信号，基于该校正信号校正RC积分器中的电阻校正阵列中的电阻。 预定电阻与RC积分器中的电阻校正阵列中的电阻相同。 Sigma-Delta调制器和模数转换器可以校正RC积分器中的电阻偏差。
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6.发明申请MOSTLY-DIGITAL OPEN-LOOP RING OSCILLATOR DELTA-SIGMA ADC AND METHODS FOR CONVERSION 有权大数字开环振荡器DELTA-SIGMA ADC和转换方法公开(公告)号：US20140368366A1
公开(公告)日：2014-12-18
申请号：US14302626
申请日：2014-06-12
发明人： Ian Galton , Gerry Taylor
IPC分类号： H03M3/00
摘要： A continuous-time delta-sigma modulator for analog-to-digital conversion includes a pair of pseudo-differential signal paths including a pair of pseudo-differential signal paths including current-controlled ring oscillators as the load of open-loop common-source amplifiers that are driven by an analog input signal. The signal path produces digital values by sampling the open-loop current-controlled ring oscillators. A calibration circuit measures nonlinear distortion coefficients in a replica of the signal path. A nonlinearity corrector corrects digital values based upon the nonlinear distortion coefficients
摘要翻译： 用于模数转换的连续时间Δ-Σ调制器包括一对伪差分信号路径，其包括一对伪差分信号路径，包括作为开环共源极放大器的负载的电流控制环形振荡器 由模拟输入信号驱动。 信号路径通过采样开环电流控制的环形振荡器产生数字值。 校准电路测量信号路径副本中的非线性失真系数。 非线性校正器基于非线性失真系数校正数字值
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7.发明授权公开(公告)号：US08253611B2
公开(公告)日：2012-08-28
申请号：US12899158
申请日：2010-10-06
IPC分类号： H03M1/10
摘要： Traditionally, pipelined continuous-time (CT) sigma-delta modulators (SDM) have been difficult to build due at least in part to the difficulties in calibrating the pipeline. Here, however, a pipelined CT SDM is provided that has an architecture that is conducing to being calibrated. Namely, the system includes a digital filter and other features that can be adjusted to account for input imbalance errors and well as quantization leakage noise.
摘要翻译： 传统上，流水线连续时间（CT）Σ-Δ调制器（SDM）已经难以构建，至少部分是由于校准管道的困难。 然而，这里提供了一种流水线CT SDM，其具有有助于被校准的架构。 也就是说，该系统包括数字滤波器和其他可调整的特征，以解决输入不平衡误差以及量化泄漏噪声。
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公开(公告)号：US20120200440A1
公开(公告)日：2012-08-09
申请号：US13359310
申请日：2012-01-26
申请人： Hiroyuki OKADA , Naohiro MATSUI
发明人： Hiroyuki OKADA , Naohiro MATSUI
摘要： An A/D converter and a semiconductor device simple in configuration are provided which can keep a constant noise shaping characteristic without depending on manufacturing variations or a temperature change. A semiconductor device includes a delta-sigma modulator, an input changeover switch, and a control logic circuit. The delta-sigma modulator can change a time constant of an internal circuit according to a control signal. The input changeover switch selectively inputs any one of an input amplitude voltage and a reference voltage to the delta-sigma modulator. A control logic circuit is coupled to an output of the delta-sigma modulator, and generates the control signal.
摘要翻译： 提供一种A / D转换器和简单构造的半导体器件，其可以保持恒定的噪声整形特性而不依赖于制造变化或温度变化。 半导体器件包括Δ-Σ调制器，输入转换开关和控制逻辑电路。 Δ-Σ调制器可以根据控制信号改变内部电路的时间常数。 输入切换开关选择性地将输入幅度电压和参考电压中的任何一个输入到Δ-Σ调制器。 控制逻辑电路耦合到Δ-Σ调制器的输出，并产生控制信号。
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9.发明授权公开(公告)号：US07659841B1
公开(公告)日：2010-02-09
申请号：US12187541
申请日：2008-08-07
申请人： G. Richard Newell
发明人： G. Richard Newell
IPC分类号： H03M1/10
CPC分类号： H03M3/38 , H03M3/358 , H03M3/43 , H03M3/438 , H03M7/3011 , H03M7/3028 , H03M7/3033
摘要： A circuit and method for compensating sigma-delta modulators in A/D and D/A converters is disclosed. Circuits according to the invention use a low-resolution Sigma-Delta encoded version of the signal to inexpensively encode quadratic and cubic compensation terms. These circuits can encode quadratic and cubic compensation signals with acceptably low quantization noise without requiring the use of expensive multi-bit multipliers to compute the square or cube of the signal. The method includes providing a binary word Q or a binary word C (or both) representing the desired amount of quadratic or cubic compensation to apply. Because the encoded quadratic and cubic signals have only one or a few bits, they can be multiplied by Q and C without the use of expensive multi-bit multipliers and applied to the modulator input or output to provide a compensated result.
摘要翻译： 公开了用于补偿A / D和D / A转换器中的Σ-Δ调制器的电路和方法。 根据本发明的电路使用信号的低分辨率Σ-Δ编码版本来廉价地编码二次和三次补偿项。 这些电路可以编码具有可接受的低量化噪声的二次和三次补偿信号，而不需要使用昂贵的多位乘法器来计算信号的平方或立方。 该方法包括提供表示要应用的二次或三次补偿的期望量的二进制字Q或二进制字C（或两者）。 由于编码的二次和三次信号只有一个或几个位，所以它们可以与Q和C相乘，而不需要使用昂贵的多位乘法器，并将其应用于调制器输入或输出以提供补偿结果。
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10.发明申请公开(公告)号：US20030149538A1
公开(公告)日：2003-08-07
申请号：US10329988
申请日：2002-12-26
IPC分类号： G01R035/00
摘要： A method of self-calibrating a modulator includes at least one integrator likely to incur a phase error may include reading a pulse response of the modulator, calculating a phase error parameter of the at least one integrator, and calibrating the phase error parameter. In addition, the calibration may provide a count of pulse response samples above suitable threshold values, as well as a change in the value of a capacitor associated with the integrator based upon the sample count.
摘要翻译： 自校准调制器的方法包括可能引起相位误差的至少一个积分器可以包括读取调制器的脉冲响应，计算至少一个积分器的相位误差参数，以及校准相位误差参数。 此外，校准可以提供高于合适阈值的脉冲响应样本的计数，以及基于样本计数与积分器相关联的电容器的值的变化。
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