DIRECT CURRENT MEASUREMENT OF 1/F TRANSISTOR NOISE

    公开(公告)号:US20220082608A1

    公开(公告)日:2022-03-17

    申请号:US17537007

    申请日:2021-11-29

    Abstract: A system comprises a noise generator circuit and a noise envelope detector circuit. The noise generator circuit comprises a first amplifier including a single transistor pair that is operable to generate 1/f noise, an output amplifier coupled to the first amplifier and configured to generate a 1/f noise signal as a function of the 1/f noise. The noise envelope detector circuit comprises a low pass filter operable to pass low frequency signals of the 1/f noise signal as a filtered 1/f noise signal, and a second amplifier or a comparator coupled to the low pass filter and operable to output a direct current (DC) voltage signal according to an envelope of the filtered 1/f noise signal, where the DC voltage signal is a function of an envelope of the filtered 1/f noise signal.

    Capacitive mismatch measurement
    2.
    发明授权

    公开(公告)号:US10236900B1

    公开(公告)日:2019-03-19

    申请号:US15836976

    申请日:2017-12-11

    Abstract: An analog-to-digital converter (ADC) comprising successive approximation circuitry, a capacitive analog-to-digital converter (CDAC), and capacitor mismatch measurement circuitry. The successive approximation circuitry is configured to control conversion of an analog signal to a digital value. The CDAC is coupled to the successive approximation circuitry. The CDAC includes a plurality of capacitors. The capacitor mismatch measurement circuitry is coupled to the CDAC. The capacitor mismatch measurement circuitry includes a first oscillator circuit, a second oscillator circuit, and counter circuitry. The first oscillator circuit is configured to oscillate at a frequency determined by a capacitance of one of the capacitors. The second oscillator circuit is configured to generate a predetermined time interval. The counter circuitry is configured to count a number of cycles of oscillation of the first oscillator in the predetermined time interval.

    INTEGRATION SCHEME TO BUILD RESISTOR, CAPACITOR, EFUSE USING SILICON-RICH DIELECTRIC LAYER AS A BASE DIELECTRIC

    公开(公告)号:US20220375856A1

    公开(公告)日:2022-11-24

    申请号:US17489910

    申请日:2021-09-30

    Abstract: A method and an electronic device that includes an isolation structure having a dielectric material on or in a semiconductor surface layer, and a passive circuit component having a metal silicide structure on a side of the isolation structure, there the metal silicide structure includes a metal silicide portion and a dielectric portion, the dielectric portion of the metal silicide structure including one of silicon nitride, silicon oxide, silicon carbide, silicon carbon nitride, and silicon oxynitride. The method includes forming a dielectric material of the isolation structure on or in the semiconductor surface layer, forming a silicon-rich dielectric layer on a side of the isolation structure, and siliciding the silicon-rich dielectric layer to form the metal silicide structure on the side of the isolation structure.

    Direct current measurement of 1/f transistor noise

    公开(公告)号:US11249130B2

    公开(公告)日:2022-02-15

    申请号:US15859244

    申请日:2017-12-29

    Abstract: A system comprises a noise generator circuit and a noise envelope detector circuit. The noise generator circuit comprises a first amplifier including a single transistor pair that is operable to generate 1/f noise, an output amplifier coupled to the first amplifier and configured to generate a 1/f noise signal as a function of the 1/f noise. The noise envelope detector circuit comprises a low pass filter operable to pass low frequency signals of the 1/f noise signal as a filtered 1/f noise signal, and a second amplifier or a comparator coupled to the low pass filter and operable to output a direct current (DC) voltage signal according to an envelope of the filtered 1/f noise signal, where the DC voltage signal is a function of an envelope of the filtered 1/f noise signal.

    Direct current measurement of 1/f transistor noise

    公开(公告)号:US11796588B2

    公开(公告)日:2023-10-24

    申请号:US17537007

    申请日:2021-11-29

    CPC classification number: G01R31/2626

    Abstract: A system comprises a noise generator circuit and a noise envelope detector circuit. The noise generator circuit comprises a first amplifier including a single transistor pair that is operable to generate 1/f noise, an output amplifier coupled to the first amplifier and configured to generate a 1/f noise signal as a function of the 1/f noise. The noise envelope detector circuit comprises a low pass filter operable to pass low frequency signals of the 1/f noise signal as a filtered 1/f noise signal, and a second amplifier or a comparator coupled to the low pass filter and operable to output a direct current (DC) voltage signal according to an envelope of the filtered 1/f noise signal, where the DC voltage signal is a function of an envelope of the filtered 1/f noise signal.

Patent Agency Ranking