公开(公告)号：US20190189942A1

公开(公告)日：2019-06-20

申请号：US16283666

申请日：2019-02-22

Applicant: TOPPAN PRINTING CO., LTD.

Inventor： Noriaki IKEDA ,  Makoto NISHIZAWA

IPC: H01L51/10 ,  H01L51/05

CPC classification number: H01L51/105 ,  G09F9/30 ,  H01L21/28 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786 ,  H01L51/05 ,  H01L51/0541 ,  H01L51/0545

Abstract: An organic thin-film transistor includes an insulating substrate, a capacitor electrode formed on the insulating substrate, a first insulating layer covering the capacitor electrode, a gate electrode formed on the first insulating layer, a second insulating layer covering the gate electrode and the capacitor electrode, a source electrode formed on the second insulating layer, a drain electrode formed on the second insulating layer, and a semiconductor layer formed on the second insulating layer in a portion between the source electrode and the drain electrode and including an organic semiconductor material.

公开(公告)号：US20180026141A1

公开(公告)日：2018-01-25

申请号：US15714393

申请日：2017-09-25

Applicant: TOPPAN PRINTING CO., LTD.

Inventor： Noriaki IKEDA ,  Makoto NISHIZAWA

IPC: H01L29/786 ,  H01L21/283 ,  H01L27/12 ,  G02F1/136 ,  H01L29/66 ,  H01L29/417 ,  H01L21/768

CPC classification number: H01L29/7869 ,  G02F1/136 ,  H01L21/28 ,  H01L21/283 ,  H01L21/768 ,  H01L23/532 ,  H01L27/1259 ,  H01L27/3258 ,  H01L27/3274 ,  H01L29/41733 ,  H01L29/6675 ,  H01L29/786 ,  H01L51/0545

Abstract: A thin-film transistor including an insulative substrate, a gate electrode formed on the insulative substrate, a gate insulating layer formed on the substrate and the gate electrode, a source electrode and a drain electrode forming on the gate insulating layer and spaced from each other, a semiconductor layer formed on the gate insulating layer and connected to the source electrode and the drain electrode, a semiconductor protective layer formed on the semiconductor layer, an interlayer insulating film formed on the source electrode, the drain electrode and the semiconductor protective layer, the interlayer insulating film including a fluorine compound, and an upper electrode formed on the interlayer insulating film.

公开(公告)号：US20170221968A1

公开(公告)日：2017-08-03

申请号：US15487529

申请日：2017-04-14

Applicant: TOPPAN PRINTING CO., LTD.

Inventor： Ryohei MATSUBARA ,  Mamoru ISHIZAKI ,  Makoto NISHIZAWA

IPC: H01L27/28 ,  H01L51/05 ,  H01L51/10 ,  H01L51/00

CPC classification number: H01L27/283 ,  G02F1/1368 ,  H01L27/285 ,  H01L29/786 ,  H01L51/0004 ,  H01L51/0558 ,  H01L51/107

Abstract: A thin-film transistor array includes a substrate and thin-film transistors positioned in matrix on the substrate. The thin-film transistors each include source and drain electrodes formed on a gate insulation layer, and a semiconductor layer formed on the gate insulation layer and positioned between the source and drain electrodes. The semiconductor layer is formed in stripes over the plurality of thin-film transistors such that one of the stripes has a long axis direction coinciding with a channel width direction of one of the thin-film transistors. The semiconductor layer has a cross section in a short axis direction of the stripe such that a thickness of the semiconductor layer gradually decreases outwardly from a center portion of the stripe.