公开(公告)号：US20190088855A1

公开(公告)日：2019-03-21

申请号：US15918235

申请日：2018-03-12

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Koji YAMAKAWA ,  Koji UEDA

IPC: H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12 ,  H01F10/32

Abstract: According to one embodiment, a magnetic memory device includes a lower region, and a stacked structure provided on the lower region, wherein the stacked structure includes a conductive oxide layer containing boron (B), a first magnetic layer provided between the lower region and the conductive oxide layer, having a variable magnetization direction, and containing iron (Fe) and boron (B), a second magnetic layer provided between the lower region and the first magnetic layer, having a fixed magnetization direction, and containing iron (Fe) and boron (B), and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer.

公开(公告)号：US20200044149A1

公开(公告)日：2020-02-06

申请号：US16285109

申请日：2019-02-25

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Koji YAMAKAWA

IPC: H01L45/00 ,  H01L27/24

Abstract: A semiconductor memory device includes a first electrode and a second electrode opposed to each other in a first direction, a phase-change film provided between the first electrode and the second electrode, a first film formed of an insulator provided on a side surface of the phase-change film in a second direction intersecting the first direction, and a second film formed of a conductor containing carbon and provided along a side surface of the phase-change film in the second direction with the first film interposed between the second film and the side surface.

公开(公告)号：US20180269043A1

公开(公告)日：2018-09-20

申请号：US15704820

申请日：2017-09-14

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Koji UEDA ,  Koji YAMAKAWA ,  Toshihiko NAGASE ,  Youngmin EEH ,  Kazuya SAWADA

IPC: H01J37/34 ,  C23C14/35 ,  H01L21/02

CPC classification number: H01J37/3435 ,  C23C14/35 ,  C23C14/352 ,  C23C14/505 ,  C23C14/542 ,  H01J37/3405 ,  H01J37/3452 ,  H01L21/02175 ,  H01L21/02266 ,  H01L43/12

Abstract: According to one embodiment, a film formation method using a magnetron sputtering apparatus including first and second magnets provided on first and second target holders, includes forming an insulating film on a wafer placed on a main surface of a wafer stage by sputtering first and second insulating targets set on the first and second target holders, wherein the wafer includes an effective area to be used for a product and an ineffective area outside the effective area, and when viewed from a direction perpendicular to the main surface of the wafer stage, at least a part of the first magnet overlaps the effective area of the wafer placed on the main surface of the wafer stage, and the entire second magnet does not overlap the effective area of the wafer placed on the main surface of the wafer stage.

公开(公告)号：US20200052039A1

公开(公告)日：2020-02-13

申请号：US16285123

申请日：2019-02-25

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Koji YAMAKAWA

IPC: H01L27/24 ,  H01L45/00

Abstract: The semiconductor memory device includes: a first electrode and a second electrode disposed opposed to each other in a first direction; a resistance change film that is provided between the first electrode and the second electrode and contains at least one kind of element selected from germanium, antimony, and tellurium; and a first layer that is provided on a side surface of the resistance change film in a second direction intersecting the first direction and contains at least one kind of the element forming the resistance change film and at least one kind of element selected from nitrogen, carbon, boron, and oxygen.