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    Semiconductor memory device
    1.
    发明授权
    Semiconductor memory device 有权

    公开(公告)号：US10020055B2

    公开(公告)日：2018-07-10

    申请号：US15830311

    申请日：2017-12-04

    申请人： TOSHIBA MEMORY CORPORATION

    发明人： Kunifumi Suzuki ,  Kazuhiko Yamamoto

    IPC分类号： G11C13/00

    CPC分类号： G11C13/0069 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0011 ,  G11C13/0064 ,  G11C2013/0092 ,  G11C2213/11 ,  G11C2213/33 ,  G11C2213/34 ,  G11C2213/77

    摘要： According to embodiments, a semiconductor memory device includes a first electrode, a second electrode, a memory cell, and a control circuit. The memory cell is provided between the first electrode and the second electrode and includes a metal film and a resistance change film. The control circuit applies a voltage between the first electrode and the second electrode to perform transition of a resistive state of the memory cell. The control circuit performs a first writing operation by applying a first pulse having a voltage of a first polarity to the memory cell and applying a second pulse having a voltage of the first polarity smaller than the voltage of the first pulse to the memory cell continuously after applying the first pulse.

    Nonvolatile semiconductor memory device
    2.
    发明授权
    Nonvolatile semiconductor memory device 有权

    公开(公告)号：US10665605B2

    公开(公告)日：2020-05-26

    申请号：US16122842

    申请日：2018-09-05

    申请人： TOSHIBA MEMORY CORPORATION

    发明人： Kunifumi Suzuki ,  Kazuhiko Yamamoto

    IPC分类号： H01L27/11582 ,  H01L27/1157 ,  G11C7/06 ,  G11C16/24 ,  G11C16/14 ,  G11C16/04 ,  G11C16/08 ,  G11C16/26

    摘要： According to one embodiment, a nonvolatile semiconductor memory device includes a first interconnect layer provided above a semiconductor substrate; a plurality of second interconnect layers provided above the first interconnect layer; a semiconductor layer electrically coupled to the first interconnect layer; a first insulating layer provided between the semiconductor layer and the plurality of second interconnect layers; and a plurality of first oxide layers in which one side of the first oxide layers is in contact with the plurality of second interconnect layers while the other side of the first oxide layers is in contact with the first insulating layer, and a voltage is applied to the plurality of second interconnect layers to vary a resistance value.

    Memory device and manufacturing method of memory device
    3.
    发明授权
    Memory device and manufacturing method of memory device 有权

    公开(公告)号：US10103324B2

    公开(公告)日：2018-10-16

    申请号：US14839871

    申请日：2015-08-28

    申请人： Toshiba Memory Corporation

    发明人： Kunifumi Suzuki ,  Kazuhiko Yamamoto

    IPC分类号： H01L45/00 ,  H01L27/24

    摘要： A memory device includes a plurality of bit lines, including first and second bit lines, extending in a first direction away from a substrate, a plurality of word lines, including first and second word lines, extending in a second direction crossing the first direction and substantially parallel to a surface of the substrate, a first variable resistance film between the first word line and the first bit line and a second variable resistance film between the second word line and the second bit line, an insulating material electrically isolating the first and second word lines and the first and second bit lines, and a plurality of air gaps between the first and second bit lines.

    Semiconductor memory device
    4.
    发明授权
    Semiconductor memory device 有权

    公开(公告)号：US09859002B2

    公开(公告)日：2018-01-02

    申请号：US15269506

    申请日：2016-09-19

    申请人： TOSHIBA MEMORY CORPORATION

    发明人： Kunifumi Suzuki ,  Kazuhiko Yamamoto

    IPC分类号： G11C13/00

    CPC分类号： G11C13/0069 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0011 ,  G11C13/0064 ,  G11C2013/0092 ,  G11C2213/11 ,  G11C2213/33 ,  G11C2213/34 ,  G11C2213/77

    摘要： According to embodiments, a semiconductor memory device includes a first electrode, a second electrode, a memory cell, and a control circuit. The memory cell is provided between the first electrode and the second electrode and includes a metal film and a resistance change film. The control circuit applies a voltage between the first electrode and the second electrode to perform transition of a resistive state of the memory cell. The control circuit performs a first writing operation by applying a first pulse having a voltage of a first polarity to the memory cell and applying a second pulse having a voltage of the first polarity smaller than the voltage of the first pulse to the memory cell continuously after applying the first pulse.

    Storage device having a memory cell with a variable resistance element, in which voltage applied to a word line of the memory cell is controlled based on voltage of a bit line of the memory cell
    6.
    发明授权
    Storage device having a memory cell with a variable resistance element, in which voltage applied to a word line of the memory cell is controlled based on voltage of a bit line of the memory cell 有权

    公开(公告)号：US11017854B2

    公开(公告)日：2021-05-25

    申请号：US16558905

    申请日：2019-09-03

    申请人： TOSHIBA MEMORY CORPORATION

    发明人： Kunifumi Suzuki

    IPC分类号： G11C13/00 ,  H01L27/24 ,  H01L45/00

    摘要： A storage device includes a first layer extending in a first direction, a second layer extending in a second direction intersecting the first direction, a third layer extending in a third direction intersecting the first and second directions, a first transistor including a first gate electrode electrically connected to the second layer, a first selection transistor having a first end electrically connected to the third layer and a second end electrically connected to the second layer, a first cell including a first element electrically connected between the first and second layers and to a node of the second layer that is between the first gate electrode of the first transistor and the second end of the first selection transistor, and a circuit turning on the first selection transistor to electrically connect the first cell to the third layer during a write operation performed on the first cell.

    Semiconductor memory device
    7.
    发明授权
    Semiconductor memory device 审中-公开

    公开(公告)号：US10672793B2

    公开(公告)日：2020-06-02

    申请号：US16267878

    申请日：2019-02-05

    申请人： Toshiba Memory Corporation

    发明人： Hiroki Tokuhira ,  Kazuhiko Yamamoto ,  Kunifumi Suzuki

    IPC分类号： H01L29/792 ,  H01L27/11582 ,  H01L29/51

    摘要： A semiconductor memory device includes a stacked body including insulating layers and gate electrode layers alternately stacked in a direction, a semiconductor layer extending in the direction, and a gate insulating layer provided between the semiconductor layer and the gate electrode layer, and including a first layer, a second layer, and a third layer between the first layer and the second layer. The first layer includes a first insulator, the second layer includes at least one oxide selected from aluminum oxide, yttrium oxide, lanthanum oxide, gadolinium oxide, ytterbium oxide, hafnium oxide, and zirconium oxide, the third layer includes at least one material selected from silicon, germanium, silicon germanium and silicon carbide, and the third layer is positioned between the semiconductor layer and the insulating layer.

    Memory device
    9.
    发明授权
    Memory device 有权

    公开(公告)号：US10825866B2

    公开(公告)日：2020-11-03

    申请号：US15910690

    申请日：2018-03-02

    申请人： TOSHIBA MEMORY CORPORATION

    发明人： Kunifumi Suzuki ,  Kazuhiko Yamamoto

    IPC分类号： H01L45/00 ,  H01L27/24 ,  G11C13/00

    摘要： A memory device is described. A first conductive layer extends in a first direction. A second conductive layer extends in the first direction. A third conductive layer extends in a second direction intersecting the first direction. A first oxide region is disposed between the first conductive layer and the third conductive layer and between the second conductive layer and the third conductive layer. A semiconductor region is disposed between the first conductive layer and the first oxide region and between the first conductive layer and the second conductive layer. A second distance between the semiconductor region, which is disposed between the first conductive layer and the second conductive layer, and the third conductive layer, is longer than a first distance between the semiconductor region, which is disposed between the first conductive layer and the first oxide region, and the third conductive layer.

    Semiconductor memory device
    10.
    发明授权
    Semiconductor memory device 有权

    公开(公告)号：US10658038B2

    公开(公告)日：2020-05-19

    申请号：US16252629

    申请日：2019-01-19

    申请人： TOSHIBA MEMORY CORPORATION

    发明人： Kunifumi Suzuki ,  Kazuhiko Yamamoto

    IPC分类号： G11C13/00

    摘要： According to embodiments, a semiconductor memory device includes a first electrode, a second electrode, a memory cell, and a control circuit. The memory cell is provided between the first electrode and the second electrode and includes a metal film and a resistance change film. The control circuit applies a voltage between the first electrode and the second electrode to perform transition of a resistive state of the memory cell. The control circuit performs a first writing operation by applying a first pulse having a voltage of a first polarity to the memory cell and applying a second pulse having a voltage of the first polarity smaller than the voltage of the first pulse to the memory cell continuously after applying the first pulse.