公开(公告)号：US10121797B2

公开(公告)日：2018-11-06

申请号：US15269082

申请日：2016-09-19

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Shigeki Kobayashi ,  Satoshi Konagai ,  Atsushi Konno ,  Kenta Yamada ,  Masaaki Higuchi ,  Masao Shingu ,  Soichiro Kitazaki ,  Yoshimasa Mikajiri

IPC: H01L27/115 ,  H01L29/51 ,  H01L27/11582 ,  H01L29/423 ,  H01L29/49 ,  H01L21/285 ,  H01L21/28 ,  H01L21/768

Abstract: According to an embodiment, a semiconductor memory device comprises: a stacked body including control gate electrodes stacked upwardly of a substrate; a semiconductor layer facing the control gate electrodes; and a gate insulating layer provided between the control gate electrode and the semiconductor layer. The stacked body comprises: a first metal layer configuring the control gate electrode; a first barrier metal layer contacting an upper surface of this first metal layer; a first silicon nitride layer contacting an upper surface of this first barrier metal layer; a first inter-layer insulating layer contacting an upper surface of this first silicon nitride layer; a second barrier metal layer contacting a lower surface of the first metal layer; a second silicon nitride layer contacting a lower surface of this second barrier metal layer; and a second inter-layer insulating layer contacting a lower surface of this second silicon nitride layer.

公开(公告)号：US09929176B2

公开(公告)日：2018-03-27

申请号：US15398230

申请日：2017-01-04

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Masaaki Higuchi ,  Masaru Kito ,  Masao Shingu

IPC: H01L29/788 ,  H01L27/11582 ,  H01L27/1157

CPC classification number: H01L27/11582 ,  H01L27/1157 ,  H01L29/66833 ,  H01L29/7926

Abstract: According to an embodiment, a non-volatile storage device includes a first layer, a second layer formed on the first layer, a stacked body including a plurality of conductive films stacked on the second layer, and a semiconductor pillar which penetrates the stacked body and the second layer and reaches the first layer. The semiconductor pillar includes a semiconductor film formed along an extending direction of the semiconductor pillar, and a memory film which covers a periphery of the semiconductor film. The memory film includes a first portion formed between the stacked body and the semiconductor film and a second portion formed between the second layer and the semiconductor film. An outer periphery of the second portion in a plane perpendicular to the extending direction is wider than an outer periphery of the first portion on a second layer side of the stacked body.

公开(公告)号：US20210210507A1

公开(公告)日：2021-07-08

申请号：US17205329

申请日：2021-03-18

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Masaaki HIGUCHI ,  Masaru Kito ,  Masao Shingu

IPC: H01L27/11582 ,  H01L27/1157 ,  H01L29/66 ,  H01L29/792

Abstract: According to an embodiment, a non-volatile storage device includes a first layer, a second layer formed on the first layer, a stacked body including a plurality of conductive films stacked on the second layer, and a semiconductor pillar which penetrates the stacked body and the second layer and reaches the first layer. The semiconductor pillar includes a semiconductor film formed along an extending direction of the semiconductor pillar, and a memory film which covers a periphery of the semiconductor film. The memory film includes a first portion formed between the stacked body and the semiconductor film and a second portion formed between the second layer and the semiconductor film. An outer periphery of the second portion in a plane perpendicular to the extending direction is wider than an outer periphery of the first portion on a second layer side of the stacked body.

公开(公告)号：US09786678B2

公开(公告)日：2017-10-10

申请号：US14798891

申请日：2015-07-14

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Katsuyuki Sekine ,  Masaaki Higuchi ,  Masao Shingu ,  Hirokazu Ishigaki ,  Naoki Yasuda

IPC: H01L27/11582 ,  H01L29/51 ,  H01L21/02 ,  H01L27/1157 ,  H01L27/11575

CPC classification number: H01L27/11582 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/0223 ,  H01L27/1157 ,  H01L27/11575 ,  H01L29/511 ,  H01L29/518

Abstract: According to an embodiment, a nonvolatile semiconductor memory device comprises a plurality of conductive layers stacked in a first direction via an inter-layer insulating layer. In addition, the nonvolatile semiconductor memory device comprises: a semiconductor layer having the first direction as a longer direction; a tunnel insulating layer contacting a side surface of the semiconductor layer; a charge accumulation layer contacting a side surface of the tunnel insulating layer; and a block insulating layer contacting a portion facing the conductive layer, of a side surface of the charge accumulation layer. Moreover, the portion facing the conductive layer, of the charge accumulation layer is thinner compared to a portion facing the inter-layer insulating layer, of the charge accumulation layer.

公开(公告)号：US10181477B2

公开(公告)日：2019-01-15

申请号：US15262274

申请日：2016-09-12

Applicant: Toshiba Memory Corporation

Inventor： Hirokazu Ishigaki ,  Tatsuya Okamoto ,  Masao Shingu

IPC: H01L29/792 ,  H01L27/11582 ,  H01L29/30 ,  H01L27/11568 ,  H01L21/28 ,  H01L21/02

Abstract: According to the embodiment, a semiconductor device includes: a substrate; a stacked body provided on the substrate and including a plurality of electrode layers stacked with an insulator interposed; a semiconductor pillar provided on the substrate and in the stacked body; a semiconductor body provided in the stacked body; and an insulating film including a charge storage film provided between the plurality of electrode layers and the semiconductor body, and extending in the stacking direction. The semiconductor body includes a first portion and a second portion. The first portion is surrounded with the plurality of electrode layers and extends in a stacking direction of the stacked body. The second portion is in contact with an upper surface of the semiconductor pillar.

公开(公告)号：US10269821B2

公开(公告)日：2019-04-23

申请号：US15046054

申请日：2016-02-17

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Masao Shingu ,  Katsuyuki Sekine ,  Hirokazu Ishigaki ,  Makoto Fujiwara

IPC: H01L27/11578 ,  H01L27/11563 ,  H01L27/1157

Abstract: A semiconductor memory device includes first and second electrode films, an interlayer insulating film, a semiconductor pillar, and a first insulating film. The first electrode film extends in a first direction. The second electrode film is provided separately from the first electrode film in a second direction and extends in the first direction. The interlayer insulating film is provided between the first and the second electrode films. The first insulating film includes first and second insulating regions. A concentration of nitrogen in the first position of the second insulating region is higher than a concentration of nitrogen in the second position between the first position and the semiconductor pillar. A concentration of nitrogen in the first insulating region is lower than the concentration of the nitrogen in the first position.

公开(公告)号：US09831180B2

公开(公告)日：2017-11-28

申请号：US15268034

申请日：2016-09-16

Applicant: Toshiba Memory Corporation

Inventor： Masao Shingu ,  Kenta Yamada ,  Masaaki Higuchi ,  Daigo Ichinose

IPC: H01L29/788 ,  H01L21/20 ,  H01L23/528 ,  H01L27/1157 ,  H01L27/11582 ,  H01L23/522 ,  H01L21/768

CPC classification number: H01L23/5283 ,  H01L21/76816 ,  H01L21/76877 ,  H01L23/5226 ,  H01L27/1157 ,  H01L27/11575 ,  H01L27/11582

Abstract: According to the embodiment, the semiconductor device includes: a substrate; a stacked body; and a plurality of columnar portions. The stacked body is provided on the substrate. The stacked body includes a plurality of electrode layers stacked with an insulator interposed. The stacked body includes a stacked portion and a staircase portion. The plurality of electrode layers includes a first portion and a second portion. The columnar portions are provided in the stacked portion of the stacked body. The columnar portions extend in a stacking direction of the stacked body. The columnar portions include a semiconductor body extending in the stacking direction and a charge storage film. The second portion includes a third portion. A thickness of the third portion along the stacking direction is thinner than a thickness of the first portion along the stacking direction.

公开(公告)号：US10985173B2

公开(公告)日：2021-04-20

申请号：US15897623

申请日：2018-02-15

Applicant: Toshiba Memory Corporation

Inventor： Masaaki Higuchi ,  Masaru Kito ,  Masao Shingu

IPC: H01L27/11582 ,  H01L27/1157 ,  H01L29/66 ,  H01L29/792

Abstract: According to an embodiment, a non-volatile storage device includes a first layer, a second layer formed on the first layer, a stacked body including a plurality of conductive films stacked on the second layer, and a semiconductor pillar which penetrates the stacked body and the second layer and reaches the first layer. The semiconductor pillar includes a semiconductor film formed along an extending direction of the semiconductor pillar, and a memory film which covers a periphery of the semiconductor film. The memory film includes a first portion formed between the stacked body and the semiconductor film and a second portion formed between the second layer and the semiconductor film. An outer periphery of the second portion in a plane perpendicular to the extending direction is wider than an outer periphery of the first portion on a second layer side of the stacked body.

公开(公告)号：US10032935B2

公开(公告)日：2018-07-24

申请号：US15280013

申请日：2016-09-29

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Masaaki Higuchi ,  Masao Shingu ,  Tatsuya Kato ,  Takeshi Murata ,  Makoto Fujiwara ,  Masaki Kondo ,  Muneyuki Tsuda ,  Takashi Kurusu

IPC: H01L29/792 ,  H01L27/1157 ,  H01L27/11582 ,  H01L23/522 ,  H01L23/528 ,  H01L29/10 ,  G11C16/26 ,  G11C16/08

Abstract: A semiconductor memory device includes a substrate, a multi-layered structure including a plurality of insulating layers and a plurality of conductive layers that are alternately formed above the substrate, and a pillar extending through the multi-layered structure. The pillar includes a semiconductor body extending along the pillar, and a charge-storing film around the semiconductor body, the charge-storing film having a first thickness at first portions facing the insulating layers and a second thickness greater than the first thickness at second portions facing the conductive layers.