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公开(公告)号：US20190096991A1
公开(公告)日：2019-03-28
申请号：US16114774
申请日：2018-08-28
发明人： Takaki NIWA , Takahiro Fujii , Masayoshi Kosaki
IPC分类号： H01L29/06 , H01L29/20 , H01L29/78 , H01L21/306 , H01L21/308 , H01L21/02 , H01L21/265 , H01L21/266 , H01L21/285 , H01L21/28 , H01L29/66
摘要： A method for manufacturing a semiconductor device comprises forming first groove, depositing, and ion-implanting. At the step of forming the first groove, the first groove is formed in a stacked body comprising a gallium nitride (GaN)-based first semiconductor layer containing an n-type impurity and a gallium nitride (GaN)-based second semiconductor layer stacked on the first semiconductor layer and containing a p-type impurity. The first groove has a bottom portion located in the second semiconductor layer. At the depositing step, a p-type impurity is deposited on side portion and the bottom portion of the first groove. At the ion-implanting step, a p-type impurity is ion-implanted into the first semiconductor layer through the first groove.
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公开(公告)号：US10083918B2
公开(公告)日：2018-09-25
申请号：US15697261
申请日：2017-09-06
发明人： Takahiro Fujii , Masayoshi Kosaki , Takaki Niwa
IPC分类号： H01L23/00 , H01L21/265 , H01L21/266 , H01L21/324 , H01L29/20 , H01L29/267 , H01L29/423 , H01L29/66 , H01L21/02 , H01L29/45
CPC分类号： H01L23/562 , H01L21/02178 , H01L21/02189 , H01L21/0228 , H01L21/0254 , H01L21/0262 , H01L21/26546 , H01L21/266 , H01L21/3245 , H01L29/2003 , H01L29/267 , H01L29/4236 , H01L29/42376 , H01L29/452 , H01L29/66522 , H01L29/66666
摘要： There is provided a manufacturing method of a semiconductor device. The manufacturing method of the semiconductor device comprises: forming at least part of a cap layer that is mainly composed of a nitride, on a semiconductor layer that is mainly composed of a group III nitride semiconductor; implanting a p-type impurity into the semiconductor layer with at least part of the cap layer formed thereon, by ion implantation; forming a block layer having a larger coefficient of thermal expansion than a coefficient of thermal expansion of the cap layer, as a surface layer on the cap layer; and heating the semiconductor layer with the block layer as the surface layer, to activate the p-type impurity.
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公开(公告)号：US10332754B2
公开(公告)日：2019-06-25
申请号：US15164988
申请日：2016-05-26
发明人： Takaki Niwa , Takahiro Fujii , Masayoshi Kosaki , Tohru Oka
IPC分类号： H01L21/02 , H01L21/324 , H01L21/265 , H01L29/20
摘要： There is provided a method of manufacturing a nitride semiconductor device. The method of manufacturing the nitride semiconductor device comprises: a first film forming process that forms a first film on a nitride semiconductor layer; an ion implantation process that implants a P-type impurity into the nitride semiconductor layer through the first film by ion implantation; a second film forming process that forms a second film on the first film, after the ion implantation process; and a heat treatment process that processes the nitride semiconductor layer by heat treatment after the second film forming process. This suppresses the surface of the nitride semiconductor layer from being roughened.
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公开(公告)号：US10026851B2
公开(公告)日：2018-07-17
申请号：US15442359
申请日：2017-02-24
发明人： Takaki Niwa , Takahiro Fujii , Masayoshi Kosaki , Tohru Oka
IPC分类号： H01L29/15 , H01L29/872 , H01L29/868 , H01L29/40 , H01L29/36 , H01L29/207 , H01L29/20 , H01L29/06
摘要： There is provided an MPS diode comprising a first semiconductor layer that is an N type; P-type semiconductor regions and N-type semiconductor regions that are arranged alternately on one surface of the first semiconductor layer; and a Schottky electrode that is in Schottky junction with the N-type semiconductor regions and is arranged to be adjacent to and in contact with at least part of the P-type semiconductor regions. A donor concentration in an area of the N-type semiconductor region that is adjacent to and in contact with the first semiconductor layer is lower than the donor concentration in an area of the first semiconductor layer that is adjacent to and in contact with the N-type semiconductor region and is lower than the donor concentration in an area of the N-type semiconductor region that is adjacent to and in contact with the Schottky electrode. This configuration improves a breakdown voltage under applying a reverse bias voltage and reduces a rising voltage under applying a forward bias voltage.
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公开(公告)号：US09905432B2
公开(公告)日：2018-02-27
申请号：US15060473
申请日：2016-03-03
发明人： Takaki Niwa , Tohru Oka , Masayoshi Kosaki , Takahiro Fujii , Yukihisa Ueno
IPC分类号： H01L21/324 , H01L29/66 , H01L21/265 , H01L21/02 , H01L29/78 , H01L29/20
CPC分类号： H01L21/3245 , H01L21/02107 , H01L21/26553 , H01L21/324 , H01L29/2003 , H01L29/66712 , H01L29/7813
摘要： The method for manufacturing comprises an ion implantation process of implanting a p-type impurity into a semiconductor layer mainly made of a group III nitride by ion implantation; a first heating process of heating the semiconductor layer at a first temperature in a first atmospheric gas including ammonia (NH3) after the ion implantation process; and a second heating process of heating the semiconductor layer, after the first heating process, at a second temperature that is lower than the first temperature in a second atmospheric gas including oxygen (O2).
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公开(公告)号：US10510833B2
公开(公告)日：2019-12-17
申请号：US16114774
申请日：2018-08-28
发明人： Takaki Niwa , Takahiro Fujii , Masayoshi Kosaki
IPC分类号： H01L29/66 , H01L21/28 , H01L21/02 , H01L29/06 , H01L29/78 , H01L21/306 , H01L21/308 , H01L21/265 , H01L21/266 , H01L21/285 , H01L29/20
摘要： A method for manufacturing a semiconductor device comprises forming first groove, depositing, and ion-implanting. At the step of forming the first groove, the first groove is formed in a stacked body comprising a gallium nitride (GaN)-based first semiconductor layer containing an n-type impurity and a gallium nitride (GaN)-based second semiconductor layer stacked on the first semiconductor layer and containing a p-type impurity. The first groove has a bottom portion located in the second semiconductor layer. At the depositing step, a p-type impurity is deposited on side portion and the bottom portion of the first groove. At the ion-implanting step, a p-type impurity is ion-implanted into the first semiconductor layer through the first groove.
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公开(公告)号：US09852925B2
公开(公告)日：2017-12-26
申请号：US15457881
申请日：2017-03-13
发明人： Takahiro Fujii , Masayoshi Kosaki , Takaki Niwa
IPC分类号： H01L21/265 , H01L21/324 , H01L29/20 , H01L29/78 , H01L29/872
CPC分类号： H01L21/3245 , H01L21/26546 , H01L29/0619 , H01L29/0661 , H01L29/1095 , H01L29/2003 , H01L29/41766 , H01L29/66212 , H01L29/66348 , H01L29/66727 , H01L29/66734 , H01L29/7397 , H01L29/7813 , H01L29/872
摘要： A technique of reducing the manufacturing cost of a semiconductor device is provided, There is provided a method of manufacturing a semiconductor device comprising an ion implantation process of implanting at least one of magnesium and beryllium by ion implantation into a first semiconductor layer that is mainly formed from a group III nitride; and a heating process of heating the first semiconductor layer in an atmosphere that includes an anneal gas of at least one of magnesium and beryllium, after the ion implantation process.
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公开(公告)号：US09269778B2
公开(公告)日：2016-02-23
申请号：US14175893
申请日：2014-02-07
发明人： Masayoshi Kosaki , Takahiro Fujii
IPC分类号： H01L29/20 , H01L21/02 , H01L29/872 , H01L29/66
CPC分类号： H01L29/2003 , H01L21/02389 , H01L21/02458 , H01L21/0254 , H01L21/02576 , H01L21/02579 , H01L21/0262 , H01L29/66522 , H01L29/872
摘要： A semiconductor apparatus includes a semiconductor substrate that has a diameter of 2 inches or larger, and an N-type semiconductor layer that is stacked on the semiconductor substrate using a material including gallium nitride (GaN). A median of a plurality of measured values of the concentration of carbon (C) at a plurality of locations on a face of a region of the N-type semiconductor layer is equal to or lower than 1.0×1016 cm−3. The maximum value in difference between the median and the other measured values is lower than 5×1015 cm−3.
摘要翻译： 半导体装置包括直径为2英寸以上的半导体基板和使用包含氮化镓（GaN）的材料堆叠在半导体基板上的N型半导体层。 在N型半导体层的区域的多个位置处的多个碳浓度（C）的测定值的中值为1.0×1016cm-3以下。 中位数与其他测量值的差值最大值小于5×1015 cm-3。
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公开(公告)号：US20170278719A1
公开(公告)日：2017-09-28
申请号：US15457881
申请日：2017-03-13
发明人： Takahiro Fujii , Masayoshi Kosaki , Takaki Niwa
IPC分类号： H01L21/324 , H01L29/872 , H01L29/78 , H01L21/265 , H01L29/20
CPC分类号： H01L21/3245 , H01L21/26546 , H01L29/0619 , H01L29/0661 , H01L29/1095 , H01L29/2003 , H01L29/41766 , H01L29/66212 , H01L29/66348 , H01L29/66727 , H01L29/66734 , H01L29/7397 , H01L29/7813 , H01L29/872
摘要： A technique of reducing the manufacturing cost of a semiconductor device is provided, There is provided a method of manufacturing a semiconductor device comprising an ion implantation process of implanting at least one of magnesium and beryllium by ion implantation into a first semiconductor layer that is mainly formed from a group III nitride; and a heating process of heating the first semiconductor layer in an atmosphere that includes an anneal gas of at least one of magnesium and beryllium, after the ion implantation process,
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公开(公告)号：US09704952B2
公开(公告)日：2017-07-11
申请号：US15065708
申请日：2016-03-09
发明人： Takaki Niwa , Masayoshi Kosaki , Takahiro Fujii , Tohru Oka , Yukihisa Ueno
IPC分类号： H01L29/06 , H01L29/20 , H01L27/02 , H01L21/02 , H01L29/423
CPC分类号： H01L29/0684 , H01L21/02458 , H01L21/0254 , H01L21/02576 , H01L21/02579 , H01L21/0262 , H01L27/0255 , H01L29/0657 , H01L29/0688 , H01L29/2003 , H01L29/4236 , H01L29/66136 , H01L29/8613
摘要： An object is to provide a technique that suppresses decrease in the breakdown voltage of a protective element. There is provided a semiconductor device that comprises a vertical MOS transistor and a protective element. A first nitride semiconductor layer has a convex that is protruded toward a second nitride semiconductor layer. The convex has a top face placed at a position to overlap with at least part of an ohmic electrode of a second conductive type when viewed from a stacking direction of a stacked body. The thickness of the second nitride semiconductor layer in a portion which a bottom face of a trench is in contact with is greater than the thickness of the second nitride semiconductor layer in a portion which the top face of the convex is in contact with.
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