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公开(公告)号:US20190252183A1
公开(公告)日:2019-08-15
申请号:US16383609
申请日:2019-04-14
申请人: RFHIC Corporation
IPC分类号: H01L21/02 , C23C16/27 , H01L29/267 , H01L29/16 , H01L29/20
CPC分类号: H01L21/02115 , C23C16/274 , H01L21/02263 , H01L21/02274 , H01L21/02304 , H01L21/0237 , H01L21/02389 , H01L21/02444 , H01L21/02513 , H01L21/02527 , H01L21/02595 , H01L21/0262 , H01L29/1602 , H01L29/2003 , H01L29/267
摘要: A method of fabricating a semiconductor device structure includes: providing a substrate comprising a layer of compound semiconductor material; forming a seed layer of nano-crystalline diamond having a layer thickness in a range 5 to 50 nm on the layer of compound semiconductor material; and growing a layer of polycrystalline CVD diamond on the seed layer using a chemical vapour deposition (CVD) technique. An effective thermal boundary resistance (TBReff) at an interface between the layer of compound semiconductor material and the layer of polycrystalline CVD diamond material is no more than 50 m2K/GW.
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公开(公告)号:US20190245045A1
公开(公告)日:2019-08-08
申请号:US16245003
申请日:2019-01-10
发明人: Keita KATAOKA , Tetsuo NARITA
IPC分类号: H01L29/20 , H01L29/78 , H01L29/423 , H01L29/08 , H01L29/10 , H01L29/06 , H01L29/66 , H01L21/266 , H01L21/324 , H01L21/02
CPC分类号: H01L29/2003 , H01L21/02389 , H01L21/266 , H01L21/324 , H01L29/0619 , H01L29/0865 , H01L29/1095 , H01L29/4236 , H01L29/66734 , H01L29/7804 , H01L29/7813
摘要: A method of manufacturing a group III nitride semiconductor substrate may comprise introducing group III element vacancies to a first region of the group III nitride semiconductor substrate. The method may comprise introducing an acceptor element to a second region of the group III nitride semiconductor substrate. The second region may contact the first region at least in part. The method may comprise performing annealing to activate the acceptor element in the second region.
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3.
公开(公告)号:US20190088495A1
公开(公告)日:2019-03-21
申请号:US16044479
申请日:2018-07-24
IPC分类号: H01L21/306 , H01L21/67 , H01L29/20 , H01L21/02
CPC分类号: H01L21/30612 , H01L21/02389 , H01L21/02458 , H01L21/0254 , H01L21/02664 , H01L21/30635 , H01L21/67075 , H01L21/67086 , H01L21/78 , H01L21/7813 , H01L29/2003 , H01L31/02363 , H01L33/0075 , H01L33/22
摘要: Methods and systems for forming a device structure free of a substrate are described. Exemplary embodiments include a device structure comprising of device layers, a release layer, an etch stop layer, and a substrate. The device structure is exposed to photoenhanced wet etch environments to vertically and laterally etch the release layer to separate the device layers from the substrate. The device structure can include a contact layer, an etch stop layer, or both in some embodiments.
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公开(公告)号:US20190027359A9
公开(公告)日:2019-01-24
申请号:US15965014
申请日:2018-04-27
申请人: NGK INSULATORS, LTD.
发明人: Mikiya ICHIMURA , Sota MAEHARA , Yoshitaka KURAOKA
IPC分类号: H01L21/02 , C23C16/34 , C30B29/40 , C30B19/02 , H01L29/20 , H01L29/205 , H01L29/778 , H01L29/66
CPC分类号: H01L21/02389 , C23C16/303 , C23C16/34 , C30B19/02 , C30B29/406 , H01L21/02458 , H01L21/0251 , H01L21/0254 , H01L21/0262 , H01L21/205 , H01L29/2003 , H01L29/201 , H01L29/205 , H01L29/207 , H01L29/401 , H01L29/66007 , H01L29/66462 , H01L29/778 , H01L29/7786 , H01L29/7787 , H01L29/812
摘要: Provided is an epitaxial substrate for semiconductor elements which suppresses an occurrence of current collapse. The epitaxial substrate for the semiconductor elements includes: a semi-insulating free-standing substrate formed of GaN being doped with Zn; a buffer layer being adjacent to the free-standing substrate; a channel layer being adjacent to the buffer layer; and a barrier layer being provided on an opposite side of the buffer layer with the channel layer therebetween, wherein the buffer layer is a diffusion suppressing layer that suppresses diffusion of Zn from the free-standing substrate into the channel layer.
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公开(公告)号:US20180374699A1
公开(公告)日:2018-12-27
申请号:US15773864
申请日:2016-11-01
发明人: Benjamin P. Yonkee , Erin C. Young , John T. Leonard , Tal Margalith , James S. Speck , Steven P. DenBaars , Shuji Nakamura
IPC分类号: H01L21/02 , H01L29/15 , H01L29/20 , H01L29/207 , H01L29/36 , H01L29/885 , H01L31/18 , H01L31/0352 , H01L31/0304 , H01L33/00 , H01L33/06 , H01L33/32
CPC分类号: H01L21/02584 , H01L21/02389 , H01L21/02458 , H01L21/02505 , H01L21/0254 , H01L21/02576 , H01L21/02579 , H01L21/02581 , H01L21/0262 , H01L21/02631 , H01L29/15 , H01L29/2003 , H01L29/207 , H01L29/365 , H01L29/88 , H01L29/885 , H01L31/03044 , H01L31/035236 , H01L31/1856 , H01L33/0075 , H01L33/04 , H01L33/06 , H01L33/32
摘要: A III-nitride tunnel junction with a modified p-n interface, wherein the modified p-n interface includes a delta-doped layer to reduce tunneling resistance. The delta-doped layer may be doped using donor atoms comprised of Oxygen (O), Germanium (Ge) or Silicon (Si); acceptor atoms comprised of Magnesium (Mg) or Zinc (Zn); or impurities comprised of Iron (Fe) or Carbon (C).
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公开(公告)号:US20180323265A1
公开(公告)日:2018-11-08
申请号:US15586075
申请日:2017-05-03
发明人: Jia-Zhe Liu , Yen Lun Huang , Manhsuan Lin
IPC分类号: H01L29/36 , H01L21/02 , H01L29/20 , H01L29/205 , H01L29/207
CPC分类号: H01L29/365 , H01L21/02378 , H01L21/02381 , H01L21/02389 , H01L21/0242 , H01L21/02458 , H01L21/02507 , H01L21/0251 , H01L21/0254 , H01L21/0257 , H01L29/2003 , H01L29/205 , H01L29/207
摘要: A heterostructure includes a substrate; an intermediate layer disposed on the substrate; and a group III-V layer having a first primary surface disposed on the intermediate layer and a dopant concentration that varies in a manner including a plurality of ramps with at least one of increasing dopant concentration and decreasing dopant concentration, along the growth direction from the first primary surface throughout the layer's thickness before terminating in a second primary surface.
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公开(公告)号:US20180286964A1
公开(公告)日:2018-10-04
申请号:US15936305
申请日:2018-03-26
申请人: QROMIS, Inc.
发明人: Vladimir Odnoblyudov , Ozgur Aktas
IPC分类号: H01L29/66 , H01L29/20 , H01L29/872 , H01L29/207 , H01L21/78
CPC分类号: H01L29/66212 , H01L21/02389 , H01L21/0245 , H01L21/02488 , H01L21/02505 , H01L21/0254 , H01L21/762 , H01L21/7806 , H01L23/48 , H01L29/0619 , H01L29/0661 , H01L29/2003 , H01L29/207 , H01L29/402 , H01L29/872
摘要: A vertical Schottky diode includes an ohmic contact, a first epitaxial N-type gallium nitride layer physically contacting the ohmic contact and having a first doping concentration, and a second epitaxial N-type gallium nitride layer physically contacting the first epitaxial N-type gallium nitride layer and having a second doping concentration that is lower than the first doping concentration. The vertical Schottky diode further includes a first edge termination region and a second edge termination region coupled to the second epitaxial N-type gallium nitride layer and separated from each other by a portion of the second epitaxial N-type gallium nitride layer, and a Schottky contact coupled to the portion of the second epitaxial N-type gallium nitride layer, and to the first edge termination region and the second edge termination region.
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公开(公告)号:US20180286914A1
公开(公告)日:2018-10-04
申请号:US16001381
申请日:2018-06-06
申请人: QROMIS, Inc.
发明人: Vladimir Odnoblyudov , Cem Basceri
IPC分类号: H01L27/15 , H01L33/32 , H01L33/06 , H01L33/00 , H01L29/778 , H01L21/02 , H01L29/20 , H01L21/306 , H01L21/285 , H01L29/417
CPC分类号: H01L27/15 , H01L21/02389 , H01L21/0254 , H01L21/28575 , H01L21/30612 , H01L29/2003 , H01L29/41766 , H01L29/7786 , H01L29/7787 , H01L33/007 , H01L33/0075 , H01L33/06 , H01L33/32
摘要: A method includes forming a wide band gap (WBG) epitaxial layer on an engineered substrate. The WBG epitaxial layer includes a plurality of groups of epitaxial layers. The engineered substrate includes engineered layers formed on a bulk material having a coefficient of thermal expansion (CTE) matching a CTE of the WBG epitaxial layer. The method also includes forming a plurality of WBG devices based on the plurality of groups of epitaxial layers by: for each respective WBG device, forming internal interconnects and electrodes within a respective group of epitaxial layers. The method further includes forming external interconnects between the electrodes of different WBG devices of the plurality of WBG devices to form an integrated circuit.
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公开(公告)号:US20180240902A1
公开(公告)日:2018-08-23
申请号:US15891205
申请日:2018-02-07
申请人: QROMIS, Inc.
发明人: Vladimir Odnoblyudov , Cem Basceri , Ozgur Aktas
IPC分类号: H01L29/778 , H01L21/02 , H01L21/762 , H01L23/373 , H01L23/48 , H01L23/66
CPC分类号: H01L29/7787 , H01L21/02389 , H01L21/0245 , H01L21/02488 , H01L21/02491 , H01L21/02505 , H01L21/0254 , H01L21/76251 , H01L23/3735 , H01L23/481 , H01L23/66 , H01L29/122 , H01L29/404 , H01L29/41766 , H01L29/66462 , H01L29/7786 , H01L2223/6616 , H01L2223/6627
摘要: A substrate for RF devices includes a polycrystalline ceramic core and an interlayer structure. The interlayer structure includes a first silicon oxide layer coupled to the polycrystalline ceramic core, a polysilicon layer coupled to the first silicon oxide layer, a second silicon oxide layer coupled to the polysilicon layer, a barrier layer coupled to the second silicon oxide layer, a third silicon oxide layer coupled to the barrier layer, and a substantially single crystalline silicon layer coupled to the third silicon oxide layer.
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公开(公告)号:US20180151404A1
公开(公告)日:2018-05-31
申请号:US15570361
申请日:2016-05-11
申请人: RFHIC Corporation
发明人: Daniel FRANCIS
IPC分类号: H01L21/683 , H01L23/373 , H01L21/762 , H01L21/02 , H01L23/00
CPC分类号: H01L21/6835 , H01L21/02378 , H01L21/02389 , H01L21/02458 , H01L21/02527 , H01L21/02595 , H01L21/0262 , H01L21/02658 , H01L21/304 , H01L21/3065 , H01L21/7624 , H01L23/3732 , H01L24/29 , H01L24/83 , H01L24/98 , H01L2221/68345 , H01L2221/68381 , H01L2224/29193 , H01L2224/83052 , H01L2224/83192 , H01L2224/83224 , H01L2924/01014 , H01L2924/10272 , H01L2924/10323 , H01L2924/1033 , H01L2924/10344
摘要: A method of fabricating a semiconductor-on-diamond composite substrate, the method comprising: (i) starting with a native semiconductor wafer comprising a native silicon carbidesubstrate on which a compound semiconductor is disposed; (ii) bonding a silicon carbide carrier substrate to the compound semiconductor; (iii) removing the native silicon carbide substrate; (iv) forming a nucleation layer over the compound semiconductor; (v) growing polycrystalline chemical vapour deposited (CVD) diamond on the nucleation layer to form a composite diamond-compound semiconductor-silicon carbide wafer, and (vi) removing the silicon carbide carrier substrate y laser lift-off to achieve a layered structure comprising the compound semiconductor bonded to the polycrystalline CVD diamond via the nucleation layer, wherein in step (ii) the silicon carbide carrier substrate is bonded to the compound semiconductor via a laser absorption material which absorbs laser light, wherein the laser has a coherence length shorter than a thickness of the silicon carbide carrier substrate.
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