公开(公告)号：US12276836B2

公开(公告)日：2025-04-15

申请号：US18078793

申请日：2022-12-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan-Hong Chern ,  Chih-Chang Lin ,  Min-Hsiang Hsu ,  Weiwei Song ,  Chewn-Pu Jou ,  Feng-Wei Kuo ,  Huan-Neng Chen ,  Lan-Chou Cho

IPC: G02B6/12 ,  G02B6/122 ,  G02B6/13

Abstract: A semiconductor structure according to the present disclosure includes a buried oxide layer, a first dielectric layer disposed over the buried oxide layer, a first waveguide feature disposed in the first dielectric layer, a second dielectric layer disposed over the first dielectric layer and the first waveguide feature, a third dielectric layer disposed over the second dielectric layer, and a second waveguide feature disposed in the second dielectric layer and the third dielectric layer. The second waveguide feature is disposed over the first waveguide feature and a portion of the second waveguide feature vertically overlaps a portion of the first waveguide feature.

公开(公告)号：US12253745B2

公开(公告)日：2025-03-18

申请号：US18363489

申请日：2023-08-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Weiwei Song ,  Stefan Rusu ,  Chan-Hong Chern ,  Chih-Chang Lin

IPC: G02F1/01 ,  G02F1/025 ,  G02F1/225

Abstract: A semiconductor device include: a first bus waveguide; a first silicon ring optically coupled to the first bus waveguide; a backup silicon ring optically coupled to the first bus waveguide; a first heater and a second heater configured to heat the first silicon ring and the backup silicon ring, respectively; and a first switch, where the first switch is configured to electrically couple the first silicon ring to a first radio frequency (RF) circuit when the first switch is at a first switching position, and is configured to electrically couple the backup silicon ring to the first RF circuit when the first switch is at a second switching position.

公开(公告)号：US12163995B2

公开(公告)日：2024-12-10

申请号：US18196380

申请日：2023-05-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Ann Lai ,  Ruo-Rung Huang ,  Kun-Lung Chen ,  Chun-Yi Yang ,  Chan-Hong Chern

IPC: G01R31/26 ,  G01R31/27 ,  H03K3/017 ,  H03K17/687

Abstract: An apparatus and method for testing gallium nitride field effect transistors (GaN FETs) are disclosed herein. In some embodiments, the apparatus includes: a high side GaN FET, a low side GaN FET, a high side driver coupled to a gate of the high side GaN FET, a low side driver coupled to a gate of the low side GaN FET, and a driver circuit coupled to the high side and low side drivers and configured to generate drive signals capable of driving the high and low side GaN FETs, wherein the high and low side GaN FETs and transistors, within the high and low side drivers and the driver circuit, are patterned on a same semiconductor device layer during a front-end-of-line (FEOL) process.

公开(公告)号：US11973078B2

公开(公告)日：2024-04-30

申请号：US18104734

申请日：2023-02-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan-Hong Chern

IPC: H01L27/088 ,  H01L21/8252 ,  H01L29/43 ,  H01L29/66 ,  H01L29/778 ,  H03K17/687

CPC classification number: H01L27/0883 ,  H01L21/8252 ,  H01L29/432 ,  H01L29/66462 ,  H01L29/7786 ,  H03K17/6871

Abstract: Apparatus and circuits including transistors with different threshold voltages and methods of fabricating the same are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a substrate; an active layer that is formed over the substrate and comprises a plurality of active portions; a polarization modulation layer comprising a plurality of polarization modulation portions each of which is disposed on a corresponding one of the plurality of active portions; and a plurality of transistors each of which comprises a source region, a drain region, and a gate structure formed on a corresponding one of the plurality of polarization modulation portions. The transistors have at least three different threshold voltages.

公开(公告)号：US20230111170A1

公开(公告)日：2023-04-13

申请号：US18078793

申请日：2022-12-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan-Hong Chern ,  Chih-Chang Lin ,  Min-Hsiang Hsu ,  Weiwei Song ,  Chewn-Pu Jou ,  Feng-Wei Kuo ,  Huan-Neng Chen ,  Lan-Chou Cho

IPC: G02B6/122 ,  G02B6/13 ,  G02B6/12

Abstract: A semiconductor structure according to the present disclosure includes a buried oxide layer, a first dielectric layer disposed over the buried oxide layer, a first waveguide feature disposed in the first dielectric layer, a second dielectric layer disposed over the first dielectric layer and the first waveguide feature, a third dielectric layer disposed over the second dielectric layer, and a second waveguide feature disposed in the second dielectric layer and the third dielectric layer. The second waveguide feature is disposed over the first waveguide feature and a portion of the second waveguide feature vertically overlaps a portion of the first waveguide feature.

公开(公告)号：US20220342239A1

公开(公告)日：2022-10-27

申请号：US17379620

申请日：2021-07-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Weiwei Song ,  Stefan Rusu ,  Chan-Hong Chern ,  Chih-Chang Lin

IPC: G02F1/025

Abstract: A semiconductor device include: a first bus waveguide; a first silicon ring optically coupled to the first bus waveguide; a backup silicon ring optically coupled to the first bus waveguide; a first heater and a second heater configured to heat the first silicon ring and the backup silicon ring, respectively; and a first switch, where the first switch is configured to electrically couple the first silicon ring to a first radio frequency (RF) circuit when the first switch is at a first switching position, and is configured to electrically couple the backup silicon ring to the first RF circuit when the first switch is at a second switching position.

公开(公告)号：US11189719B2

公开(公告)日：2021-11-30

申请号：US16576537

申请日：2019-09-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan-Hong Chern

IPC: H01L29/778 ,  H01L27/085 ,  H01L29/08 ,  H01L29/20 ,  H01L29/207 ,  H03K17/16 ,  H01L29/66 ,  H01L21/8252 ,  H01L21/02 ,  H01L29/423 ,  H01L29/205

Abstract: Apparatus and circuits including transistors with different gate stack materials and methods of fabricating the same are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a substrate; a channel layer formed over the substrate; a first transistor formed over the channel layer, wherein the first transistor comprises a first source region, a first drain region, a first gate structure, and a first polarization modulation portion under the first gate structure; and a second transistor formed over the channel layer, wherein the second transistor comprises a second source region, a second drain region, a second gate structure, and a second polarization modulation portion under the second gate structure, wherein the first polarization modulation portion is made of a material different from that of the second polarization modulation portion.

公开(公告)号：US20210302650A1

公开(公告)日：2021-09-30

申请号：US17150628

申请日：2021-01-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Weiwei SONG ,  Chan-Hong Chern ,  Chih-Chang Lin ,  Stefan Rusu ,  Min-Hsiang Hsu

IPC: G02B6/124 ,  G02B6/122 ,  G02B6/132 ,  B29D11/00

Abstract: Methods of fabricating optical devices with high refractive index materials are disclosed. The method includes forming a first oxide layer on a substrate and forming a patterned template layer with first and second trenches on the first oxide layer. A material of the patterned template layer has a first refractive index. The method further includes forming a first portion of a waveguide and a first portion of an optical coupler within the first and second trenches, respectively, forming a second portion of the waveguide and a second portion of the optical coupler on a top surface of the patterned template layer, and depositing a cladding layer on the second portions of the waveguide and optical coupler. The waveguide and the optical coupler include materials with a second refractive index that is greater than the first refractive index.

公开(公告)号：US20210033791A1

公开(公告)日：2021-02-04

申请号：US16524167

申请日：2019-07-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan-Hong Chern ,  Min-Hsiang Hsu

IPC: G02B6/136

Abstract: Integrated optical devices and methods of forming the same are disclosed. A method of forming an integrated optical device includes the following steps. A substrate is provided. The substrate includes, from bottom to top, a first semiconductor layer, an insulating layer and a second semiconductor layer. The second semiconductor layer is patterned to form a waveguide pattern. A surface smoothing treatment is performed to the waveguide pattern until a surface roughness Rz of the waveguide pattern is equal to or less than a desired value. A cladding layer is formed over the waveguide pattern.

公开(公告)号：US10523183B2

公开(公告)日：2019-12-31

申请号：US16140982

申请日：2018-09-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan-Hong Chern ,  Kun-Lung Chen

IPC: H03K3/011 ,  H03K3/356

Abstract: Various embodiments of the present application are directed towards a level shifter with temperature compensation. In some embodiments, the level shifter comprises a transistor, a first resistor, and a second resistor. The first resistor is electrically coupled from a first source/drain of the transistor to a supply node, and the second resistor is electrically coupled from a second source/drain of the transistor to a reference node. Further, the first and second resistors have substantially the same temperature coefficients and comprise group III-V semiconductor material. By having both the first and second resistors, the output voltage of the level shifter is defined by the resistance ratio of the resistors. Further, since the first and second resistors have the same temperature coefficients, temperature induced changes in resistance is largely cancelled out in the ratio and the output voltage is less susceptible to temperature induced change than the first and second resistors individually.