公开(公告)号：US08701055B1

公开(公告)日：2014-04-15

申请号：US13707714

申请日：2012-12-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hui Yu Lee ,  Chi-Wen Chang ,  Jui-Feng Kuan ,  Wen-Shen Chou

IPC: G06F17/50

CPC classification number: G06F17/5081

Abstract: The present disclosure provides a system and method of designing an integrated circuit. A plurality of devices are selected and properties assigned to each of the plurality of devices. These plural devices having assigned properties are then combined into a macro cell whereby a density gradient pattern is generated for the macro cell. Layout dependent effect (LDE) parameters are determined for the macro cell as a function of the combination of plural devices, and electrical performance characteristics for the macro cell are simulated. A layout distribution of the plurality of devices within the macro cell can then be determined as a function of one or more of the simulated electrical performance characteristics, determined LDE parameters, and generated density gradient pattern. A design layout of an integrated circuit can be generated corresponding to the layout distribution for the macro cell.

Abstract translation: 本公开提供了一种设计集成电路的系统和方法。 选择多个设备和分配给多个设备中的每一个的属性。 然后将具有分配属性的这些多个设备组合成宏小区，由此为宏小区生成密度梯度模式。 根据多个设备的组合，为宏小区确定布局相关效应（LDE）参数，并且模拟宏小区的电气性能特性。 然后可以根据模拟电气性能特性，确定的LDE参数和生成的密度梯度图案中的一个或多个来确定宏小区内的多个设备的布局分布。 可以根据宏单元的布局分布生成集成电路的设计布局。

公开(公告)号：US11532613B2

公开(公告)日：2022-12-20

申请号：US17163960

申请日：2021-02-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hui-Yu Lee ,  Chi-Wen Chang ,  Jui-Feng Kuan ,  Yi-Kan Cheng

IPC: H01L23/34 ,  H01L23/38 ,  H01L27/06 ,  H01L23/00 ,  H01L25/065 ,  H01L35/26 ,  H01L35/18 ,  H01L23/48

Abstract: A structure and method for cooling a three-dimensional integrated circuit (3DIC) are provided. A cooling element is configured for thermal connection to the 3DIC. The cooling element includes a plurality of individually controllable cooling modules disposed at a first plurality of locations relative to the 3DIC. Each of the cooling modules includes a cold pole and a heat sink. The cold pole is configured to absorb heat from the 3DIC. The heat sink is configured to dissipate the heat absorbed by the cold pole and is coupled to the cold pole via an N-type semiconductor element and via a P-type semiconductor element. A temperature sensing element includes a plurality of thermal monitoring elements disposed at a second plurality of locations relative to the 3DIC for measuring temperatures at the second plurality of locations. The measured temperatures control the plurality of cooling modules.

公开(公告)号：US20210159225A1

公开(公告)日：2021-05-27

申请号：US17163960

申请日：2021-02-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hui-Yu Lee ,  Chi-Wen Chang ,  Jui-Feng Kuan ,  Yi-Kan Cheng

IPC: H01L27/06 ,  H01L23/34 ,  H01L23/00 ,  H01L23/38 ,  H01L25/065 ,  H01L35/26 ,  H01L35/18

Abstract: A structure and method for cooling a three-dimensional integrated circuit (3DIC) are provided. A cooling element is configured for thermal connection to the 3DIC. The cooling element includes a plurality of individually controllable cooling modules disposed at a first plurality of locations relative to the 3DIC. Each of the cooling modules includes a cold pole and a heat sink. The cold pole is configured to absorb heat from the 3DIC. The heat sink is configured to dissipate the heat absorbed by the cold pole and is coupled to the cold pole via an N-type semiconductor element and via a P-type semiconductor element. A temperature sensing element includes a plurality of thermal monitoring elements disposed at a second plurality of locations relative to the 3DIC for measuring temperatures at the second plurality of locations. The measured temperatures control the plurality of cooling modules.

公开(公告)号：US09335624B2

公开(公告)日：2016-05-10

申请号：US14277108

申请日：2014-05-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hui Yu Lee ,  Chi-Wen Chang ,  Chih Ming Yang ,  Ya Yun Liu ,  Yi-Kan Cheng

IPC: G06F17/50 ,  G03F1/00

CPC classification number: G03F1/00 ,  G03F1/144 ,  G03F1/70 ,  G03F7/70466 ,  G06F17/5068 ,  G06F17/5081

Abstract: A non-transitory, computer readable storage medium is encoded with computer program instructions, such that, when the computer program instructions are executed by a computer, the computer performs a method. The method generates mask assignment information for forming a plurality of patterns on a layer of an integrated circuit (IC) by multipatterning. The mask assignment information includes, for each of the plurality of patterns, a mask assignment identifying which of a plurality of masks is to be used to form that pattern, and a mask assignment lock state for that pattern. User inputs setting the mask assignment of at least one of the plurality of patterns, and its mask assignment lock state are received. A new mask assignment is generated for each of the plurality of patterns having an “unlocked” mask assignment lock state.

Abstract translation: 非暂时的计算机可读存储介质用计算机程序指令编码，使得当计算机程序指令由计算机执行时，计算机执行方法。 该方法通过多图案产生用于在集成电路（IC）的层上形成多个图案的掩模分配信息。 对于多个图案中的每一个，掩模分配信息包括识别多个掩模中哪一个要用于形成该图案的掩模分配以及该图案的掩模分配锁定状态。 用户输入设置多个图案中的至少一个的掩模分配以及其掩码分配锁定状态。 为具有“未锁定”掩码分配锁定状态的多个图案中的每一个生成新的掩模分配。