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公开(公告)号:US20240096677A1
公开(公告)日:2024-03-21
申请号:US18521314
申请日:2023-11-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chia-Cheng Chen , Chih-Kai Yang , Liang-Yin Chen , Huicheng Chang , Yee-Chia Yeo
IPC: H01L21/68 , G06T1/00 , G06T7/00 , G06T7/73 , H01L23/544
CPC classification number: H01L21/681 , G06T1/0014 , G06T7/0004 , G06T7/73 , H01L23/544 , G06T2207/30148 , H01L2223/54493
Abstract: A method of correcting a misalignment of a wafer on a wafer holder and an apparatus for performing the same are disclosed. In an embodiment, a semiconductor alignment apparatus includes a wafer stage; a wafer holder over the wafer stage; a first position detector configured to detect an alignment of a wafer over the wafer holder in a first direction; a second position detector configured to detect an alignment of the wafer over the wafer holder in a second direction; and a rotational detector configured to detect a rotational alignment of the wafer over the wafer holder.
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公开(公告)号:US11854853B2
公开(公告)日:2023-12-26
申请号:US17199980
申请日:2021-03-12
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chia-Cheng Chen , Chih-Kai Yang , Liang-Yin Chen , Huicheng Chang , Yee-Chia Yeo
IPC: H01L21/68 , H01L23/544 , G06T7/73 , G06T1/00 , G06T7/00
CPC classification number: H01L21/681 , G06T1/0014 , G06T7/0004 , G06T7/73 , H01L23/544 , G06T2207/30148 , H01L2223/54493
Abstract: A method of correcting a misalignment of a wafer on a wafer holder and an apparatus for performing the same are disclosed. In an embodiment, a semiconductor alignment apparatus includes a wafer stage; a wafer holder over the wafer stage; a first position detector configured to detect an alignment of a wafer over the wafer holder in a first direction; a second position detector configured to detect an alignment of the wafer over the wafer holder in a second direction; and a rotational detector configured to detect a rotational alignment of the wafer over the wafer holder.
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公开(公告)号:US20230411156A1
公开(公告)日:2023-12-21
申请号:US18362463
申请日:2023-07-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chia-Cheng Chen , Chun-Hung Wu , Liang-Yin Chen , Huicheng Chang , Yee-Chia Yeo , Chun-Yen Chang , Chih-Kai Yang , Yu-Tien Shen , Ya Hui Chang
IPC: H01L21/027 , H01L21/311 , H01L21/768
CPC classification number: H01L21/0274 , H01L21/31116 , H01L21/76802 , H01L21/31144
Abstract: A method for forming a semiconductor device is provided. In some embodiments, the method includes forming a target layer over a semiconductor substrate, forming a carbon-rich hard masking layer over the target layer, patterning features in the carbon-rich hard masking layer using an etching process, performing a directional ion beam trimming process on the features patterned in the carbon-rich hard masking layer, and patterning the target layer using the carbon-rich hard masking layer as a mask.
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公开(公告)号:US11978677B2
公开(公告)日:2024-05-07
申请号:US17459164
申请日:2021-08-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chia-Cheng Chen , Chih-Kai Yang , Liang-Yin Chen , Huicheng Chang , Yee-Chia Yeo
IPC: H01L21/66 , H01J37/20 , H01J37/22 , H01J37/304 , H01J37/317 , H01L21/265 , H01L23/544
CPC classification number: H01L22/20 , H01J37/20 , H01J37/22 , H01J37/3045 , H01J37/3171 , H01L21/265 , H01L23/544 , H01J2237/20214 , H01J2237/30438 , H01L2223/54426
Abstract: In an embodiment, a method includes: placing a wafer on an implanter platen, the wafer including alignment marks; measuring a position of the wafer by measuring positions of the alignment marks with one or more cameras; determining an angular displacement between the position of the wafer and a reference position of the wafer; and rotating the implanter platen by the angular displacement.
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公开(公告)号:US11978640B2
公开(公告)日:2024-05-07
申请号:US17226332
申请日:2021-04-09
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Yi-Chen Lo , Yi-Shan Chen , Chih-Kai Yang , Pinyen Lin
IPC: H01L21/311 , H01L21/033 , H01L21/66
CPC classification number: H01L21/31144 , H01L21/0337 , H01L22/12
Abstract: In a method of forming a pattern over a semiconductor substrate, a target layer to be patterned is formed over a substrate, a mask pattern including an opening is formed in a mask layer, a shifting film is formed in an inner sidewall of the opening, a one-directional etching operation is performed to remove a part of the shifting film and a part of the mask layer to form a shifted opening, and the target layer is patterned by using the mask layer with the shifted opening as an etching mask. A location of the shifted opening is laterally shifted from an original location of the opening.
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公开(公告)号:US20220406629A1
公开(公告)日:2022-12-22
申请号:US17720807
申请日:2022-04-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chia-Cheng Chen , Chih-Kai Yang , Chun-Liang Chen , Wei-Ting Chien , Liang-Yin Chen , Huicheng Chang , Yee-Chia Yeo
Abstract: In an embodiment, a pattern transfer processing chamber includes a pattern transfer processing chamber and a loading area external to the pattern transfer processing chamber. The loading area is configured to transfer a wafer to or from the pattern transfer processing chamber. The loading area comprises a first region including a loadport, a second region including a load-lock between the first region and the pattern transfer processing chamber, and an embedded baking chamber configured to heat a patterned photoresist on the wafer.
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公开(公告)号:US12191174B2
公开(公告)日:2025-01-07
申请号:US17720807
申请日:2022-04-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chia-Cheng Chen , Chih-Kai Yang , Chun-Liang Chen , Wei-Ting Chien , Liang-Yin Chen , Huicheng Chang , Yee-Chia Yeo
Abstract: In an embodiment, a pattern transfer processing chamber includes a pattern transfer processing chamber and a loading area external to the pattern transfer processing chamber. The loading area is configured to transfer a wafer to or from the pattern transfer processing chamber. The loading area comprises a first region including a loadport, a second region including a load-lock between the first region and the pattern transfer processing chamber, and an embedded baking chamber configured to heat a patterned photoresist on the wafer.
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公开(公告)号:US20240395581A1
公开(公告)日:2024-11-28
申请号:US18790913
申请日:2024-07-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chia-Cheng Chen , Chih-Kai Yang , Chun-Liang Chen , Wei-Ting Chien , Liang-Yin Chen , Huicheng Chang , Yee-Chia Yeo
Abstract: In an embodiment, a pattern transfer processing chamber includes a pattern transfer processing chamber and a loading area external to the pattern transfer processing chamber. The loading area is configured to transfer a wafer to or from the pattern transfer processing chamber. The loading area comprises a first region including a loadport, a second region including a load-lock between the first region and the pattern transfer processing chamber, and an embedded baking chamber configured to heat a patterned photoresist on the wafer.
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公开(公告)号:US20240274478A1
公开(公告)日:2024-08-15
申请号:US18627057
申请日:2024-04-04
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chia-Cheng Chen , Chih-Kai Yang , Liang-Yin Chen , Huicheng Chang , Yee-Chia Yeo
IPC: H01L21/66 , H01J37/20 , H01J37/22 , H01J37/304 , H01J37/317 , H01L21/265 , H01L23/544
CPC classification number: H01L22/20 , H01J37/20 , H01J37/22 , H01J37/3045 , H01J37/3171 , H01L21/265 , H01L23/544 , H01J2237/20214 , H01J2237/30438 , H01L2223/54426
Abstract: In an embodiment, a method includes: placing a wafer on an implanter platen, the wafer including alignment marks; measuring a position of the wafer by measuring positions of the alignment marks with one or more cameras; determining an angular displacement between the position of the wafer and a reference position of the wafer; and rotating the implanter platen by the angular displacement.
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公开(公告)号:US11776810B2
公开(公告)日:2023-10-03
申请号:US17463000
申请日:2021-08-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chia-Cheng Chen , Chun-Hung Wu , Liang-Yin Chen , Huicheng Chang , Yee-Chia Yeo , Chun-Yen Chang , Chih-Kai Yang , Yu-Tien Shen , Ya Hui Chang
IPC: H01L21/027 , H01L21/768 , H01L21/311
CPC classification number: H01L21/0274 , H01L21/31116 , H01L21/31144 , H01L21/76802
Abstract: A method for forming a semiconductor device is provided. In some embodiments, the method includes forming a target layer over a semiconductor substrate, forming a carbon-rich hard masking layer over the target layer, patterning features in the carbon-rich hard masking layer using an etching process, performing a directional ion beam trimming process on the features patterned in the carbon-rich hard masking layer, and patterning the target layer using the carbon-rich hard masking layer as a mask.
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