公开(公告)号：US11322680B2

公开(公告)日：2022-05-03

申请号：US16884297

申请日：2020-05-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Perng-Fei Yuh ,  Yih Wang

IPC: G11C11/16 ,  H01L43/02 ,  G11C5/02 ,  H01L27/22

Abstract: Magnetic random access memory (MRAM) cells are provided. An MRAM cell includes a plurality of stacked magnetic tunnel junction (MTJ) devices coupled in serial and a transistor. The transistor having a gate coupled to a word line, a first terminal coupled to a bit line through the stacked MTJ devices, and a second terminal coupled to a source line. The stacked MTJ devices are different sizes.

公开(公告)号：US11276604B1

公开(公告)日：2022-03-15

申请号：US17081709

申请日：2020-10-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chansyun David Yang ,  Chan-Lon Yang ,  Keh-Jeng Chang ,  Perng-Fei Yuh

IPC: H01L21/687 ,  H01L21/3213 ,  H01J37/32 ,  H01L21/311

Abstract: The present disclosure describes methods and systems for radical-activated etching of a metal oxide. The system includes a chamber, a wafer holder configured to hold a wafer with a metal oxide disposed thereon, a first gas line fluidly connected to the chamber and configured to deliver a gas to the chamber, a plasma generator configured to generate a plasma from the gas, a grid system between the plasma generator and the wafer holder and configured to increase a kinetic energy of ions from the plasma, a neutralizer between the grid system and the wafer holder and configured to generate electrons and neutralize the ions to generate radicals, and a second gas line fluidly connected to the chamber and configured to deliver a precursor across the wafer. The radicals facilitate etching of the metal oxide by the precursor.

公开(公告)号：US11961706B2

公开(公告)日：2024-04-16

申请号：US17245724

申请日：2021-04-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chansyun David Yang ,  Keh-Jeng Chang ,  Chan-Lon Yang ,  Perng-Fei Yuh

IPC: H01J37/08 ,  H01J37/305

CPC classification number: H01J37/3053 ,  H01J37/08 ,  H01J2237/1506 ,  H01J2237/20214 ,  H01J2237/3151

Abstract: The present disclosure relates to an ion beam etching (IBE) system including a plasma chamber configured to provide plasma, a screen grid, an extraction grid, an accelerator grid, and a decelerator grid. The screen grid receives a screen grid voltage to extract ions from the plasma within the plasma chamber to form an ion beam through a hole. The extraction grid receives an extraction grid voltage, where a voltage difference between the screen grid voltage and the extraction grid voltage determines an ion current density of the ion beam. The accelerator grid receives an accelerator grid voltage. A voltage difference between the extraction grid voltage and the accelerator grid voltage determines an ion beam energy for the ion beam. The IBE system can further includes a deflector system having a first deflector plate and a second deflector plate around a hole to control the direction of the ion beam.

公开(公告)号：US12211918B2

公开(公告)日：2025-01-28

申请号：US18231486

申请日：2023-08-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chansyun David Yang ,  Keh-Jeng Chang ,  Chan-Lon Yang ,  Perng-Fei Yuh

IPC: H01L29/00 ,  H01L29/06 ,  H01L29/10 ,  H01L29/40 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

Abstract: A semiconductor device with different configurations of nanostructured channel regions and a method of fabricating the semiconductor device are disclosed. The semiconductor device includes a fin structure disposed on a substrate, a stack of nanostructured horizontal channel (NHC) regions disposed on the fin structure, a nanostructured vertical channel (NVC) region disposed within the stack of NHC regions, a source/drain (S/D) region disposed on the fin structure, and a gate structure disposed on the NHC regions and on portions of the NVC region that are not covered by the NHC regions and the fin structure.

公开(公告)号：US12027583B2

公开(公告)日：2024-07-02

申请号：US17320170

申请日：2021-05-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chansyun David Yang ,  Keh-Jeng Chang ,  Chan-Lon Yang ,  Perng-Fei Yuh

IPC: H01L29/66 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/78

CPC classification number: H01L29/0673 ,  H01L21/823418 ,  H01L21/823431 ,  H01L29/66795 ,  H01L29/7851

Abstract: A semiconductor device with different configurations of gate structures and a method of fabricating the semiconductor device are disclosed. The semiconductor device includes a stack of nanostructured channel regions disposed on a fin structure, a first gate structure disposed within the stack of nanostructured channel regions, a second gate structure surrounds the first gate structure about a first axis and surrounds the nanostructured channel regions about a second axis different from the first axis, and first and second contact structures disposed on the first and second gate structures, respectively.

公开(公告)号：US11869954B2

公开(公告)日：2024-01-09

申请号：US17334541

申请日：2021-05-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chansyun David Yang ,  Keh-Jeng Chang ,  Chan-Lon Yang ,  Perng-Fei Yuh

IPC: H01L29/00 ,  H01L29/423 ,  H01L29/06 ,  H01L29/786 ,  H01L29/66 ,  H01L29/40 ,  H01L29/10

CPC classification number: H01L29/42392 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/1037 ,  H01L29/401 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/78696

Abstract: A semiconductor device with different configurations of nanostructured channel regions and a method of fabricating the semiconductor device are disclosed. The semiconductor device includes a fin structure disposed on a substrate, a stack of nanostructured horizontal channel (NHC) regions disposed on the fin structure, a nanostructured vertical channel (NVC) region disposed within the stack of NHC regions, a source/drain (S/D) region disposed on the fin structure, and a gate structure disposed on the NHC regions and on portions of the NVC region that are not covered by the NHC regions and the fin structure.