公开(公告)号：US12302599B2

公开(公告)日：2025-05-13

申请号：US17845036

申请日：2022-06-21

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wei-Chiang Hung

IPC: H01L29/417 ,  H01L21/285 ,  H01L21/768 ,  H01L23/535 ,  H01L29/08 ,  H01L29/45 ,  H01L29/66 ,  H01L29/78 ,  H10D30/01 ,  H10D30/62 ,  H10D62/13 ,  H10D64/62

Abstract: A semiconductor device includes a fin structure, a source/drain region, a first inter-layer dielectric (ILD) layer, a first contact plug, and a second contact plug. The fin structure extends above a substrate. The source/drain region is in the fin structure. The first ILD layer is over the source/drain region. The first contact plug extends through the first ILD layer to a silicide region of the source/drain region. The second contact plug is over the first contact plug. The first contact plug has a protruding portion extending above the first ILD layer and laterally surrounding a lower part of the second contact plug.

公开(公告)号：US10396184B2

公开(公告)日：2019-08-27

申请号：US15885036

申请日：2018-01-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Cheng Chang ,  Chih-Han Lin ,  Wei-Chiang Hung ,  Wei-Hao Huang

IPC: H01L31/072 ,  H01L31/0328 ,  H01L29/66 ,  H01L29/78 ,  H01L29/165 ,  H01L29/417 ,  H01L21/762 ,  H01L21/02 ,  H01L21/306 ,  H01L21/324

Abstract: Examples of an integrated circuit and a method for forming the integrated circuit are provided herein. In some examples, a method includes receiving a substrate that includes: a plurality of fins extending above a remainder of the substrate; a first region that includes a first fence region that contains a first subset of the plurality of fins; and a second region that includes a second fence region that contains a second subset of the plurality of fins. The first region has a first performance characteristic, and the second region has a second performance characteristic that is different from the first. Based on the first performance characteristic, the first subset of the plurality of fins is recessed to a first height, and based on the second performance characteristic, the second subset of the plurality of fins is recessed to a second height that is less than the first height.

公开(公告)号：US20190148520A1

公开(公告)日：2019-05-16

申请号：US15885036

申请日：2018-01-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Cheng Chang ,  Chih-Han Lin ,  Wei-Chiang Hung ,  Wei-Hao Huang

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/165 ,  H01L29/417 ,  H01L21/02 ,  H01L21/306 ,  H01L21/324 ,  H01L21/762

CPC classification number: H01L29/66795 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/02667 ,  H01L21/30625 ,  H01L21/3086 ,  H01L21/324 ,  H01L21/76224 ,  H01L29/165 ,  H01L29/41791 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/7848 ,  H01L29/785

Abstract: Examples of an integrated circuit and a method for forming the integrated circuit are provided herein. In some examples, a method includes receiving a substrate that includes: a plurality of fins extending above a remainder of the substrate; a first region that includes a first fence region that contains a first subset of the plurality of fins; and a second region that includes a second fence region that contains a second subset of the plurality of fins. The first region has a first performance characteristic, and the second region has a second performance characteristic that is different from the first. Based on the first performance characteristic, the first subset of the plurality of fins is recessed to a first height, and based on the second performance characteristic, the second subset of the plurality of fins is recessed to a second height that is less than the first height.

公开(公告)号：US10998428B2

公开(公告)日：2021-05-04

申请号：US16550743

申请日：2019-08-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Cheng Chang ,  Chih-Han Lin ,  Wei-Chiang Hung ,  Wei-Hao Huang

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/165 ,  H01L29/417 ,  H01L21/762 ,  H01L21/02 ,  H01L21/306 ,  H01L21/324 ,  H01L21/308 ,  H01L29/51 ,  H01L29/49

Abstract: Examples of an integrated circuit and a method for forming the integrated circuit are provided herein. In some examples, a method includes receiving a substrate that includes: a plurality of fins extending above a remainder of the substrate; a first region that includes a first fence region that contains a first subset of the plurality of fins; and a second region that includes a second fence region that contains a second subset of the plurality of fins. The first region has a first performance characteristic, and the second region has a second performance characteristic that is different from the first. Based on the first performance characteristic, the first subset of the plurality of fins is recessed to a first height, and based on the second performance characteristic, the second subset of the plurality of fins is recessed to a second height that is less than the first height.

公开(公告)号：US20200013881A1

公开(公告)日：2020-01-09

申请号：US16550743

申请日：2019-08-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Cheng Chang ,  Chih-Han Lin ,  Wei-Chiang Hung ,  Wei-Hao Huang

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/165 ,  H01L29/417 ,  H01L21/762 ,  H01L21/02 ,  H01L21/306 ,  H01L21/324

Abstract: Examples of an integrated circuit and a method for forming the integrated circuit are provided herein. In some examples, a method includes receiving a substrate that includes: a plurality of fins extending above a remainder of the substrate; a first region that includes a first fence region that contains a first subset of the plurality of fins; and a second region that includes a second fence region that contains a second subset of the plurality of fins. The first region has a first performance characteristic, and the second region has a second performance characteristic that is different from the first. Based on the first performance characteristic, the first subset of the plurality of fins is recessed to a first height, and based on the second performance characteristic, the second subset of the plurality of fins is recessed to a second height that is less than the first height.